mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-18 10:31:57 +00:00
d99d68bcee
to catch cases like: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 By commuting ADD, it let coalescer eliminate all of the copies. However, there was a bug in the heuristics where it ended up commuting the ADD in: %reg1024<def> = MOV r0 %reg1025<def> = MOV 0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 That did no benefit but rather ensure the last MOV would not be coalesced. rdar://11355268 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156048 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
366 B
LLVM
19 lines
366 B
LLVM
; A test for checking PR 9623
|
|
; RUN: llc -march=x86-64 -mcpu=corei7 -promote-elements < %s | FileCheck %s
|
|
|
|
target triple = "x86_64-apple-darwin"
|
|
|
|
; CHECK: pmulld
|
|
; CHECK: paddd
|
|
; CHECK-NOT: movdqa
|
|
; CHECK: ret
|
|
|
|
define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {
|
|
entry:
|
|
%binop = mul <4 x i8> %x, %y
|
|
%binop6 = add <4 x i8> %binop, %x
|
|
ret <4 x i8> %binop6
|
|
}
|
|
|
|
|