Jakob Stoklund Olesen 33a537a5c4 Allow trailing physreg RegisterSDNode operands on non-variadic instructions. ... Also allow trailing register mask operands on non-variadic both MachineSDNodes and MachineInstrs. The extra physreg RegisterSDNode operands are added to the MI as <imp-use> operands. This makes it possible to have non-variadic call instructions. Call and return instructions really are non-variadic, the argument registers should only be used implicitly - they are not part of the encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159727 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-04 23:53:23 +00:00
..
CMakeLists.txt	llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.	2012-06-24 13:32:01 +00:00
DAGCombiner.cpp	Make sure type is not extended or untyped before create a constant of the type. No test case. Found by inspection.	2012-06-26 01:19:33 +00:00
FastISel.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
FunctionLoweringInfo.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
InstrEmitter.cpp	Allow trailing physreg RegisterSDNode operands on non-variadic instructions.	2012-07-04 23:53:23 +00:00
InstrEmitter.h	Allow trailing physreg RegisterSDNode operands on non-variadic instructions.	2012-07-04 23:53:23 +00:00
LegalizeDAG.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
LegalizeFloatTypes.cpp	Convert assert(0) to llvm_unreachable	2012-02-05 08:31:47 +00:00
LegalizeIntegerTypes.cpp	Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall	2012-05-25 16:35:28 +00:00
LegalizeTypes.cpp	Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall	2012-05-25 16:35:28 +00:00
LegalizeTypes.h	DAG legalisation can now handle illegal fma vector types by scalarisation	2012-06-24 00:05:44 +00:00
LegalizeTypesGeneric.cpp	Remove unnecessary default cases in switches that cover all enum values.	2012-01-10 16:47:17 +00:00
LegalizeVectorOps.cpp	'Promote' vector [su]int_to_fp should widen elements.	2012-06-28 21:03:44 +00:00
LegalizeVectorTypes.cpp	DAG legalisation can now handle illegal fma vector types by scalarisation	2012-06-24 00:05:44 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile
ResourcePriorityQueue.cpp	misched: Added MultiIssueItineraries.	2012-06-05 03:44:40 +00:00
ScheduleDAGFast.cpp	Simplify some more getAliasSet callers.	2012-06-01 22:38:17 +00:00
ScheduleDAGRRList.cpp	sdsched: Use the right heuristics when -mcpu is not provided and we have no itinerary.	2012-06-05 03:44:34 +00:00
ScheduleDAGSDNodes.cpp	Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.	2012-04-28 01:03:23 +00:00
ScheduleDAGSDNodes.h	misched: API for minimum vs. expected latency.	2012-06-05 21:11:27 +00:00
ScheduleDAGVLIW.cpp	misched preparation: rename core scheduler methods for consistency.	2012-03-07 23:00:49 +00:00
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
SelectionDAGBuilder.cpp	Reverted r156659, due to probable performance regressions, DenseMap should be used here:	2012-07-04 05:53:05 +00:00
SelectionDAGBuilder.h	Fix typos found by http://github.com/lyda/misspell-check	2012-06-02 10:20:22 +00:00
SelectionDAGDumper.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
SelectionDAGISel.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
SelectionDAGPrinter.cpp	Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and	2012-06-28 00:05:13 +00:00
TargetLowering.cpp	Target option DisableJumpTables is a gross hack. Move it to TargetLowering instead.	2012-07-02 22:39:56 +00:00
TargetSelectionDAGInfo.cpp