llvm-6502/test/CodeGen
Juergen Ributzka 4a76317ebb [FastISel] Undo phi node updates when falling-back to SelectionDAG.
The included test case would fail, because the MI PHI node would have two
operands from the same predecessor.

This problem occurs when a switch instruction couldn't be selected. This happens
always, because there is no default switch support for FastISel to begin with.

The problem was that FastISel would first add the operand to the PHI nodes and
then fall-back to SelectionDAG, which would then in turn add the same operands
to the PHI nodes again.

This fix removes these duplicate PHI node operands by reseting the
PHINodesToUpdate to its original state before FastISel tried to select the
instruction.

This fixes <rdar://problem/18155224>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216640 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-28 02:06:55 +00:00
..
AArch64 [FastISel] Undo phi node updates when falling-back to SelectionDAG. 2014-08-28 02:06:55 +00:00
ARM ARM: Add patterns for dbg 2014-08-26 12:47:26 +00:00
CPP
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips [mips] Don't use odd-numbered float registers for double arguments for fastcc 2014-08-22 09:23:22 +00:00
MSP430
NVPTX [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 2014-07-23 20:23:49 +00:00
PowerPC [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
R600 R600/SI: Use READ2/WRITE2 instructions for 64-bit mem ops with 32-bit alignment 2014-08-22 18:49:35 +00:00
SPARC
SystemZ
Thumb ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
Thumb2 ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
X86 [x86] Fix a regression introduced with r213897 for 32-bit targets where 2014-08-27 11:39:47 +00:00
XCore