Simon Pilgrim 4ad0654bb4 [X86][SSE] Enable commutation for SSE immediate blend instructions ... Patch to allow (v)blendps, (v)blendpd, (v)pblendw and vpblendd instructions to be commuted - swaps the src registers and inverts the blend mask. This is primarily to improve memory folding (see new tests), but it also improves the quality of shuffles (see modified tests). Differential Revision: http://reviews.llvm.org/D6015 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221313 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-04 23:25:08 +00:00
..
AArch64	[AArch64] Use the correct register class for ORR.	2014-11-04 22:20:07 +00:00
ARM	Remove the cortex-a9-mp CPU.	2014-11-03 17:38:00 +00:00
CPP
Generic
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs
Mips	Revert "[mips] Add names and tests for the hardware registers"	2014-11-04 22:15:05 +00:00
MSP430
NVPTX	[NVPTX] aligned byte-buffers for vector return types	2014-10-25 03:46:16 +00:00
PowerPC	[PowerPC] Initial VSX intrinsic support, with min/max for vector double	2014-10-31 19:19:07 +00:00
R600	Reapply: R600: Make sure to inline all internal functions	2014-11-03 19:49:05 +00:00
SPARC
SystemZ
Thumb	[ARM, inline-asm] Fix ARMTargetLowering::getRegForInlineAsmConstraint to return	2014-11-03 20:37:04 +00:00
Thumb2
X86	[X86][SSE] Enable commutation for SSE immediate blend instructions	2014-11-04 23:25:08 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00