mirror of
https://github.com/c64scene-ar/llvm-6502.git
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81db61a2e6
and generalize it so that it can be used by IndVarSimplify. Implement the base IndVarSimplify transformation code using IVUsers. This removes TestOrigIVForWrap and associated code, as ScalarEvolution now has enough builtin overflow detection and folding logic to handle all the same cases, and more. Run "opt -iv-users -analyze -disable-output" on your favorite loop for an example of what IVUsers does. This lets IndVarSimplify eliminate IV casts and compute trip counts in more cases. Also, this happens to finally fix the remaining testcases in PR1301. Now that IndVarSimplify is being more aggressive, it occasionally runs into the problem where ScalarEvolutionExpander's code for avoiding duplicate expansions makes it difficult to ensure that all expanded instructions dominate all the instructions that will use them. As a temporary measure, IndVarSimplify now uses a FixUsesBeforeDefs function to fix up instructions inserted by SCEVExpander. Fortunately, this code is contained, and can be easily removed once a more comprehensive solution is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71535 91177308-0d34-0410-b5e6-96231b3b80d8
161 lines
7.3 KiB
LLVM
161 lines
7.3 KiB
LLVM
; RUN: llvm-as < %s | opt -indvars -instcombine | llvm-dis | not grep {\[sz\]ext}
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; ModuleID = '<stdin>'
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;extern int *a, *b, *c, *d, *e, *f; /* 64 bit */
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;extern int K[256];
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;void foo () {
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; int i;
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; for (i=0; i<23647; i++) {
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; a[(i&15)] = b[i&15]+c[i&15];
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; a[(i+1)&15] = b[(i+1)&15]+c[(i+1)&15];
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; a[(i+2)&15] = b[(i+2)&15]+c[(i+2)&15];
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; d[i&15] = e[i&15]+f[i&15] +K[i];
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; d[(i+1)&15] = e[(i+1)&15]+f[(i+1)&15]+K[i+1];
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; d[(i+2)&15] = e[(i+2)&15]+f[(i+2)&15]+K[i+2];
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; }
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;}
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-apple-darwin9.6"
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@a = external global i32* ; <i32**> [#uses=3]
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@b = external global i32* ; <i32**> [#uses=3]
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@c = external global i32* ; <i32**> [#uses=3]
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@d = external global i32* ; <i32**> [#uses=3]
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@e = external global i32* ; <i32**> [#uses=3]
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@f = external global i32* ; <i32**> [#uses=3]
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@K = external global [256 x i32] ; <[256 x i32]*> [#uses=3]
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define void @foo() nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %116, %bb1 ] ; <i32> [#uses=22]
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%0 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%1 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%2 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%3 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%4 = zext i32 %3 to i64 ; <i64> [#uses=1]
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%5 = getelementptr i32* %2, i64 %4 ; <i32*> [#uses=1]
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%6 = load i32* %5, align 1 ; <i32> [#uses=1]
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%7 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%8 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%9 = zext i32 %8 to i64 ; <i64> [#uses=1]
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%10 = getelementptr i32* %7, i64 %9 ; <i32*> [#uses=1]
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%11 = load i32* %10, align 1 ; <i32> [#uses=1]
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%12 = add i32 %11, %6 ; <i32> [#uses=1]
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%13 = zext i32 %1 to i64 ; <i64> [#uses=1]
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%14 = getelementptr i32* %0, i64 %13 ; <i32*> [#uses=1]
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store i32 %12, i32* %14, align 1
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%15 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%16 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%17 = and i32 %16, 15 ; <i32> [#uses=1]
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%18 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%19 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%20 = and i32 %19, 15 ; <i32> [#uses=1]
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%21 = zext i32 %20 to i64 ; <i64> [#uses=1]
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%22 = getelementptr i32* %18, i64 %21 ; <i32*> [#uses=1]
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%23 = load i32* %22, align 1 ; <i32> [#uses=1]
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%24 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%25 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%26 = and i32 %25, 15 ; <i32> [#uses=1]
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%27 = zext i32 %26 to i64 ; <i64> [#uses=1]
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%28 = getelementptr i32* %24, i64 %27 ; <i32*> [#uses=1]
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%29 = load i32* %28, align 1 ; <i32> [#uses=1]
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%30 = add i32 %29, %23 ; <i32> [#uses=1]
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%31 = zext i32 %17 to i64 ; <i64> [#uses=1]
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%32 = getelementptr i32* %15, i64 %31 ; <i32*> [#uses=1]
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store i32 %30, i32* %32, align 1
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%33 = load i32** @a, align 8 ; <i32*> [#uses=1]
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%34 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%35 = and i32 %34, 15 ; <i32> [#uses=1]
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%36 = load i32** @b, align 8 ; <i32*> [#uses=1]
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%37 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%38 = and i32 %37, 15 ; <i32> [#uses=1]
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%39 = zext i32 %38 to i64 ; <i64> [#uses=1]
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%40 = getelementptr i32* %36, i64 %39 ; <i32*> [#uses=1]
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%41 = load i32* %40, align 1 ; <i32> [#uses=1]
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%42 = load i32** @c, align 8 ; <i32*> [#uses=1]
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%43 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%44 = and i32 %43, 15 ; <i32> [#uses=1]
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%45 = zext i32 %44 to i64 ; <i64> [#uses=1]
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%46 = getelementptr i32* %42, i64 %45 ; <i32*> [#uses=1]
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%47 = load i32* %46, align 1 ; <i32> [#uses=1]
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%48 = add i32 %47, %41 ; <i32> [#uses=1]
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%49 = zext i32 %35 to i64 ; <i64> [#uses=1]
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%50 = getelementptr i32* %33, i64 %49 ; <i32*> [#uses=1]
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store i32 %48, i32* %50, align 1
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%51 = load i32** @d, align 8 ; <i32*> [#uses=1]
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%52 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%53 = load i32** @e, align 8 ; <i32*> [#uses=1]
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%54 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%55 = zext i32 %54 to i64 ; <i64> [#uses=1]
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%56 = getelementptr i32* %53, i64 %55 ; <i32*> [#uses=1]
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%57 = load i32* %56, align 1 ; <i32> [#uses=1]
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%58 = load i32** @f, align 8 ; <i32*> [#uses=1]
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%59 = and i32 %i.0.reg2mem.0, 15 ; <i32> [#uses=1]
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%60 = zext i32 %59 to i64 ; <i64> [#uses=1]
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%61 = getelementptr i32* %58, i64 %60 ; <i32*> [#uses=1]
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%62 = load i32* %61, align 1 ; <i32> [#uses=1]
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%63 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
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%64 = getelementptr [256 x i32]* @K, i64 0, i64 %63 ; <i32*> [#uses=1]
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%65 = load i32* %64, align 4 ; <i32> [#uses=1]
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%66 = add i32 %62, %57 ; <i32> [#uses=1]
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%67 = add i32 %66, %65 ; <i32> [#uses=1]
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%68 = zext i32 %52 to i64 ; <i64> [#uses=1]
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%69 = getelementptr i32* %51, i64 %68 ; <i32*> [#uses=1]
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store i32 %67, i32* %69, align 1
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%70 = load i32** @d, align 8 ; <i32*> [#uses=1]
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%71 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%72 = and i32 %71, 15 ; <i32> [#uses=1]
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%73 = load i32** @e, align 8 ; <i32*> [#uses=1]
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%74 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%75 = and i32 %74, 15 ; <i32> [#uses=1]
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%76 = zext i32 %75 to i64 ; <i64> [#uses=1]
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%77 = getelementptr i32* %73, i64 %76 ; <i32*> [#uses=1]
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%78 = load i32* %77, align 1 ; <i32> [#uses=1]
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%79 = load i32** @f, align 8 ; <i32*> [#uses=1]
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%80 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%81 = and i32 %80, 15 ; <i32> [#uses=1]
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%82 = zext i32 %81 to i64 ; <i64> [#uses=1]
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%83 = getelementptr i32* %79, i64 %82 ; <i32*> [#uses=1]
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%84 = load i32* %83, align 1 ; <i32> [#uses=1]
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%85 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=1]
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%86 = sext i32 %85 to i64 ; <i64> [#uses=1]
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%87 = getelementptr [256 x i32]* @K, i64 0, i64 %86 ; <i32*> [#uses=1]
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%88 = load i32* %87, align 4 ; <i32> [#uses=1]
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%89 = add i32 %84, %78 ; <i32> [#uses=1]
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%90 = add i32 %89, %88 ; <i32> [#uses=1]
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%91 = zext i32 %72 to i64 ; <i64> [#uses=1]
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%92 = getelementptr i32* %70, i64 %91 ; <i32*> [#uses=1]
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store i32 %90, i32* %92, align 1
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%93 = load i32** @d, align 8 ; <i32*> [#uses=1]
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%94 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%95 = and i32 %94, 15 ; <i32> [#uses=1]
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%96 = load i32** @e, align 8 ; <i32*> [#uses=1]
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%97 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%98 = and i32 %97, 15 ; <i32> [#uses=1]
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%99 = zext i32 %98 to i64 ; <i64> [#uses=1]
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%100 = getelementptr i32* %96, i64 %99 ; <i32*> [#uses=1]
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%101 = load i32* %100, align 1 ; <i32> [#uses=1]
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%102 = load i32** @f, align 8 ; <i32*> [#uses=1]
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%103 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%104 = and i32 %103, 15 ; <i32> [#uses=1]
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%105 = zext i32 %104 to i64 ; <i64> [#uses=1]
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%106 = getelementptr i32* %102, i64 %105 ; <i32*> [#uses=1]
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%107 = load i32* %106, align 1 ; <i32> [#uses=1]
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%108 = add i32 %i.0.reg2mem.0, 2 ; <i32> [#uses=1]
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%109 = sext i32 %108 to i64 ; <i64> [#uses=1]
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%110 = getelementptr [256 x i32]* @K, i64 0, i64 %109 ; <i32*> [#uses=1]
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%111 = load i32* %110, align 4 ; <i32> [#uses=1]
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%112 = add i32 %107, %101 ; <i32> [#uses=1]
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%113 = add i32 %112, %111 ; <i32> [#uses=1]
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%114 = zext i32 %95 to i64 ; <i64> [#uses=1]
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%115 = getelementptr i32* %93, i64 %114 ; <i32*> [#uses=1]
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store i32 %113, i32* %115, align 1
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%116 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
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%117 = icmp sgt i32 %116, 23646 ; <i1> [#uses=1]
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br i1 %117, label %return, label %bb1
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return: ; preds = %bb1
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ret void
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}
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