llvm-6502/lib/CodeGen/SelectionDAG
2012-07-11 11:02:16 +00:00
..
CMakeLists.txt
DAGCombiner.cpp Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an MVT::i1, i.e. before type legalization. 2012-07-11 06:38:55 +00:00
FastISel.cpp Whitespace. 2012-07-06 17:44:22 +00:00
FunctionLoweringInfo.cpp Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
InstrEmitter.cpp Allow trailing physreg RegisterSDNode operands on non-variadic instructions. 2012-07-04 23:53:23 +00:00
InstrEmitter.h Allow trailing physreg RegisterSDNode operands on non-variadic instructions. 2012-07-04 23:53:23 +00:00
LegalizeDAG.cpp Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain, Value, Ptr, etc. 2012-07-11 11:02:16 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp 'Promote' vector [su]int_to_fp should widen elements. 2012-06-28 21:03:44 +00:00
LegalizeVectorTypes.cpp
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
SelectionDAGBuilder.cpp Reverted r156659, due to probable performance regressions, DenseMap should be used here: 2012-07-04 05:53:05 +00:00
SelectionDAGBuilder.h
SelectionDAGDumper.cpp Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
SelectionDAGISel.cpp Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
SelectionDAGPrinter.cpp Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
TargetLowering.cpp All cases are covered, no need for a default. This deals with the 2012-07-05 10:14:33 +00:00
TargetSelectionDAGInfo.cpp