llvm-6502/test/MC/Disassembler
Hal Finkel 7ca2a7d742 [PowerPC] Add support for dcbtst and icbt (prefetch)
Adds code generation support for dcbtst (data cache prefetch for write) and
icbt (instruction cache prefetch for read - Book E cores only).

We still end up with a 'cannot select' error for the non-supported prefetch
intrinsic forms. This will be fixed in a later commit.

Fixes PR20692.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-23 23:21:04 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM ARM: implement MRS/MSR (banked reg) system instructions. 2014-08-15 10:47:12 +00:00
Mips [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions 2014-07-09 10:40:20 +00:00
PowerPC [PowerPC] Add support for dcbtst and icbt (prefetch) 2014-08-23 23:21:04 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA 2014-07-10 11:00:55 +00:00
X86 [X86] AVX512: Add disassembler support for compressed displacement 2014-07-17 17:04:56 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00