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https://github.com/c64scene-ar/llvm-6502.git
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e228078ca6
Patch by Keith Walker! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201423 91177308-0d34-0410-b5e6-96231b3b80d8
76 lines
3.0 KiB
LLVM
76 lines
3.0 KiB
LLVM
; RUN: llc < %s -relocation-model=pic -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -relocation-model=pic -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=THUMB
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; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
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; RUN: llc < %s -relocation-model=static -mtriple=thumbv8-apple-darwin | FileCheck %s -check-prefix=THUMB2
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@nextaddr = global i8* null ; <i8**> [#uses=2]
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@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
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define internal i32 @foo(i32 %i) nounwind {
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; ARM-LABEL: foo:
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; THUMB-LABEL: foo:
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; THUMB2-LABEL: foo:
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entry:
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; _nextaddr gets CSEed for use later on.
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; THUMB: ldr r[[NEXTADDR_REG:[0-9]+]], [[NEXTADDR_CPI:LCPI0_[0-9]+]]
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; THUMB: [[NEXTADDR_PCBASE:LPC0_[0-9]]]:
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; THUMB: add r[[NEXTADDR_REG]], pc
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%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
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%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
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; indirect branch gets duplicated here
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; ARM: bx
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; THUMB: mov pc,
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; THUMB2: mov pc,
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br i1 %1, label %bb3, label %bb2
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bb2: ; preds = %entry, %bb3
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%gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
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; ARM: bx
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; THUMB: mov pc,
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indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
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bb3: ; preds = %entry
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%2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
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%gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
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br label %bb2
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L5: ; preds = %bb2
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br label %L4
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L4: ; preds = %L5, %bb2
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%res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
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br label %L3
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L3: ; preds = %L4, %bb2
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%res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
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br label %L2
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L2: ; preds = %L3, %bb2
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; THUMB: muls
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%res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
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%phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
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br label %L1
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L1: ; preds = %L2, %bb2
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%res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
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; ARM-LABEL: %L1
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; ARM: ldr [[R1:r[0-9]+]], LCPI
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; ARM: add [[R1b:r[0-9]+]], pc, [[R1]]
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; ARM: str [[R1b]]
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; THUMB-LABEL: %L1
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; THUMB: ldr [[R2:r[0-9]+]], LCPI
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; THUMB: add [[R2]], pc
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; THUMB: str [[R2]], [r[[NEXTADDR_REG]]]
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; THUMB2-LABEL: %L1
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; THUMB2: ldr [[R2:r[0-9]+]], LCPI
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; THUMB2-NEXT: str{{(.w)?}} [[R2]]
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store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
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ret i32 %res.3
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}
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; ARM: .long Ltmp1-(LPC{{.*}}+8)
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; THUMB: .long Ltmp1-(LPC{{.*}}+4)
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; THUMB: .long _nextaddr-([[NEXTADDR_PCBASE]]+4)
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; THUMB2: .long Ltmp1
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