llvm-6502/test/CodeGen
Adrian Prantl 4bd26ae070 Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now
scan the register file for sub- and super-registers.
No functionality change intended.

(Tests are updated because the comments in the assembler output are
different.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 17:56:08 +00:00
..
AArch64 AArch64: simplify tbl/tbx polymorphism 2014-02-26 11:55:09 +00:00
ARM Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now 2014-02-27 17:56:08 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC Account for 128-bit integer operations in PPCCTRLoops 2014-02-25 20:51:50 +00:00
R600 R600/SI: Optimize SI_KILL for constant operands 2014-02-27 01:47:09 +00:00
SPARC SPARC: Implement TRAP lowering. Matches what GCC emits. 2014-02-23 21:43:52 +00:00
SystemZ
Thumb
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets. 2014-02-27 09:24:31 +00:00
XCore [XCore] Support functions returning more than 4 words. 2014-02-27 17:47:54 +00:00