Jim Grosbach c7352f8ca0 ARM optional size suffix for VLDR/VSTR syntax. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144427 91177308-0d34-0410-b5e6-96231b3b80d8		2011-11-11 23:34:43 +00:00
..
Analysis	Don't forget to check FlagNW when determining whether an AddRecExpr will wrap	2011-11-09 07:11:37 +00:00
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Assembler
Bindings/Ocaml
Bitcode
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CodeGen	Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.	2011-11-11 23:31:03 +00:00
DebugInfo	Move X86 specific test in X86 directory.	2011-11-11 18:13:19 +00:00
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MC	ARM optional size suffix for VLDR/VSTR syntax.	2011-11-11 23:34:43 +00:00
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Transforms	Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which	2011-11-11 01:16:15 +00:00
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CMakeLists.txt	build/cmake: Change to require Python be available.	2011-11-04 23:04:05 +00:00
lit.cfg	Update lit's list of tools.	2011-11-05 16:20:52 +00:00
lit.site.cfg.in
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