llvm-6502/lib/Target/ARM/Disassembler
Johnny Chen 4d81c9a6ba A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP"
Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits
specified, if coproc == 10 or 11, we should reject the insn as invalid.

rdar://problem/9239922
rdar://problem/9239596


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-06 20:49:02 +00:00
..
ARMDisassembler.cpp Fixed the t2PLD and friends disassembly and add two test cases. 2011-03-26 01:32:48 +00:00
ARMDisassembler.h Better error handling of invalid IT mask '0000', instead of just asserting. 2010-04-19 23:02:58 +00:00
ARMDisassemblerCore.cpp A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" 2011-04-06 20:49:02 +00:00
ARMDisassemblerCore.h RFE encoding should also specify the "should be" encoding bits. 2011-04-04 23:39:08 +00:00
CMakeLists.txt CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86. 2010-12-29 03:59:27 +00:00
Makefile Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 2010-04-07 20:53:12 +00:00
ThumbDisassemblerCore.h Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some test cases. 2011-03-28 18:41:58 +00:00