llvm-6502/test/CodeGen
Hal Finkel 4e703f82f2 [PowerPC] Add a DAGToDAG peephole to remove unnecessary zero-exts
On PPC64, we end up with lots of i32 -> i64 zero extensions, not only from all
of the usual places, but also from the ABI, which specifies that values passed
are zero extended. Almost all 32-bit PPC instructions in PPC64 mode are defined
to do *something* to the higher-order bits, and for some instructions, that
action clears those bits (thus providing a zero-extended result). This is
especially common after rotate-and-mask instructions. Adding an additional
instruction to zero-extend the results of these instructions is unnecessary.

This PPCISelDAGToDAG peephole optimization examines these zero-extensions, and
looks back through their operands to see if all instructions will implicitly
zero extend their results. If so, we convert these instructions to their 64-bit
variants (which is an internal change only, the actual encoding of these
instructions is the same as the original 32-bit ones) and remove the
unnecessary zero-extension (changing where the INSERT_SUBREG instructions are
to make everything internally consistent).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224169 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 23:59:36 +00:00
..
AArch64 [AArch64] MachO large code-model: Materialize FP constants in code. 2014-12-10 19:43:32 +00:00
ARM Emit Tag_ABI_FP_16bit_format build attribute. 2014-12-12 11:59:18 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Enable code generation for MIPS-III. 2014-12-12 15:16:46 +00:00
MSP430
NVPTX IR: Canonicalize metadata formatting, NFC 2014-12-11 06:32:29 +00:00
PowerPC [PowerPC] Add a DAGToDAG peephole to remove unnecessary zero-exts 2014-12-12 23:59:36 +00:00
R600 R600: Fix min/max matching problems with unordered compares 2014-12-12 02:30:37 +00:00
SPARC
SystemZ
Thumb Re-add support to llvm-objdump for Mach-O universal files and archives with -macho 2014-12-04 23:56:27 +00:00
Thumb2 [ARMConstantIsland] Insert tbb/tbh optimization where previous jump table resided. 2014-12-12 23:27:40 +00:00
X86 [AVX512] Enabling bit logic lowering 2014-12-12 17:02:18 +00:00
XCore