Juergen Ributzka 4e92383b67 [MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR. ... Select the correct register class for the various instructions that are generated when combining instructions and constrain the registers to the appropriate register class. This fixes rdar://problem/18183707. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216805 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-29 23:48:09 +00:00
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AArch64	[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR.	2014-08-29 23:48:09 +00:00
ARM	[ARM] Add Thumb-2 code size optimization test for ASR (register).	2014-08-29 17:19:00 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600	R600/SI: Use mad for fsub + fmul	2014-08-29 16:01:14 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	Fix typos in comments, NFC	2014-08-29 21:53:01 +00:00
XCore