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4ec9bd9a6f
llvm-6502
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lib
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CodeGen
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SelectionDAG
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Evan Cheng
4ec9bd9a6f
Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@99501
91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 07:16:57 +00:00
..
CallingConvLower.cpp
CMakeLists.txt
DAGCombiner.cpp
FastISel.cpp
FunctionLoweringInfo.cpp
FunctionLoweringInfo.h
InstrEmitter.cpp
Make the NDEBUG assertion stronger and more clear what is
2010-03-25 05:40:48 +00:00
InstrEmitter.h
reapply 99444/99445, which I speculatively reverted in
2010-03-25 04:41:16 +00:00
LegalizeDAG.cpp
Get rid of target-specific nodes for fp16 <-> fp32 conversion.
2010-03-18 22:35:37 +00:00
LegalizeFloatTypes.cpp
Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
2010-03-14 21:08:40 +00:00
LegalizeIntegerTypes.cpp
Revert 99335. getTypeToExpandTo's iterative behavior is actually
2010-03-23 22:44:42 +00:00
LegalizeTypes.cpp
LegalizeTypes.h
Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
2010-03-14 21:08:40 +00:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp
Fixed a widening bug where we were not using the correct size for the load
2010-03-19 01:19:52 +00:00
Makefile
ScheduleDAGFast.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.
2010-03-25 07:16:57 +00:00
ScheduleDAGSDNodes.h
SDNodeDbgValue.h
Make sure SDDbgValue.Invalid is initialized to false by all the constructors.
2010-03-25 05:50:26 +00:00
SDNodeOrdering.h
SelectionDAG.cpp
Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
2010-03-25 01:38:16 +00:00
SelectionDAGBuilder.cpp
Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
2010-03-25 01:38:16 +00:00
SelectionDAGBuilder.h
SelectionDAGISel.cpp
Change tblgen to emit FOOISD opcode names as two
2010-03-25 06:33:05 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp
Remove the ConvertActions table and associated code, which is unused.
2010-03-24 00:53:38 +00:00