llvm-6502/test/CodeGen
Reed Kotler 65692c809e Expand pseudos/macros:
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16
$T8 shows up as register $24 when emitted from C++ code so we had
to change some tests that were already there for this functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 05:45:15 +00:00
..
AArch64 AArch64: remove ConstantIsland pass & put literals in separate section. 2013-02-15 09:33:43 +00:00
ARM ARM NEON: Merge a f32 bitcast of a v2i32 extractelt 2013-02-19 15:27:05 +00:00
CPP
Generic
Hexagon Hexagon: add support for predicate-GPR copies. 2013-02-13 22:56:34 +00:00
MBlaze
Mips Expand pseudos/macros: 2013-02-20 05:45:15 +00:00
MSP430
NVPTX
PowerPC
R600 R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
SI
SPARC
Thumb
Thumb2 ARM: Allocation hints must make sure to be in the alloc order. 2013-02-19 18:55:36 +00:00
X86 [ms-inline asm] Force the use of a base pointer if the MachineFunction includes 2013-02-19 23:50:45 +00:00
XCore