mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-01 03:33:42 +00:00
Pre-increment loads are microcoded on the A2, and the address increment occurs only after the load completes. As a result, the latency of the GPR address update is an additional 2 cycles on top of the load latency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191156 91177308-0d34-0410-b5e6-96231b3b80d8