llvm-6502/lib/Target/Alpha
Devang Patel 0f05d22a31 Let's ignore MDStrings also!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 02:26:12 +00:00
..
AsmPrinter Let's ignore MDStrings also! 2009-06-26 02:26:12 +00:00
Alpha.h
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp Fix old-style type names in comments. 2009-06-14 23:30:43 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp Privatize this map. 2009-06-25 18:13:04 +00:00
AlphaJITInfo.h Privatize this map. 2009-06-25 18:13:04 +00:00
AlphaLLRP.cpp Remove non-DebugLoc versions of BuildMI from Alpha and Cell. 2009-02-13 02:30:42 +00:00
AlphaMachineFunctionInfo.h
AlphaRegisterInfo.cpp Committed the wrong version in my last commit. 2009-06-26 00:17:05 +00:00
AlphaRegisterInfo.h Committed the wrong version in my last commit. 2009-06-26 00:17:05 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Provide InitializeAllTargets and InitializeNativeTarget functions in the 2009-06-23 23:59:40 +00:00
AlphaTargetMachine.h Unbreak cyclic deps 2009-06-19 19:36:55 +00:00
CMakeLists.txt CMake: corrected split of Alpha and Sparc AsmPrinters. 2008-11-11 17:10:13 +00:00
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html