Sanjay Patel 51fa1bcef3 Allow AVX vrsqrtps generation. ... This is a follow-on to r220570 that allows a 256-bit (v8f32) version of vrsqrtps to be generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220579 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-24 17:59:18 +00:00
..
AArch64	[AArch64] Fix fast-isel of cbz of i1, i8, i16	2014-10-24 09:54:41 +00:00
ARM	Do not emit intermediate register for zero FP immediate	2014-10-23 15:31:50 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips] For N32/N64, structs must be passed in the upper bits of a register.	2014-10-24 13:09:19 +00:00
MSP430	Drop the W postfix on the 16-bit registers.	2014-09-10 06:58:14 +00:00
NVPTX	[MachineSink] Use the real post dominator tree	2014-10-15 03:27:43 +00:00
PowerPC	[PATCH] Support select-cc for VSFRC when VSX is enabled	2014-10-22 16:58:20 +00:00
R600	R600/SI: Add another failing testcase for i1 copies	2014-10-22 05:30:42 +00:00
SPARC	Add back tests for empty function in SPARC and PowerPC.	2014-09-15 22:11:07 +00:00
SystemZ
Thumb	[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex	2014-10-20 11:00:18 +00:00
Thumb2	ARM: Fix a bug which was causing convergence failure in constant-island pass.	2014-10-17 01:31:47 +00:00
X86	Allow AVX vrsqrtps generation.	2014-10-24 17:59:18 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00