Evan Cheng 52cc1ea2a1 Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30470 91177308-0d34-0410-b5e6-96231b3b80d8		2006-09-18 21:49:04 +00:00
..
SelectionDAG	Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls.	2006-09-18 21:49:04 +00:00
AsmPrinter.cpp	oops	2006-09-18 18:00:18 +00:00
BranchFolding.cpp
DwarfWriter.cpp	Sort out mangled names for globals	2006-09-18 14:47:26 +00:00
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp	Keep track of the start of MBB's in a separate map from instructions. This	2006-09-15 03:57:23 +00:00
LiveVariables.cpp	Only call isUse/isDef on register operands	2006-09-05 20:19:27 +00:00
LLVMTargetMachine.cpp
MachineBasicBlock.cpp
MachineDebugInfo.cpp
MachineFunction.cpp	Use getOffset() instead.	2006-09-14 07:41:12 +00:00
MachineInstr.cpp	Only call isUse/isDef on register operands	2006-09-05 20:19:27 +00:00
MachinePassRegistry.cpp
MachOWriter.cpp	Behold, more work on relocations. Things are looking pretty good now.	2006-09-10 23:03:44 +00:00
Makefile
Passes.cpp
PHIElimination.cpp
PhysRegTracker.h
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp	Non-allocatable physregs can be killed and dead, but don't treat them as	2006-09-08 20:21:31 +00:00
RegAllocSimple.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
VirtRegMap.h	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00