mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
62 lines
1.9 KiB
LLVM
62 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
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define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) {
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; CHECK-LABEL: {{^}}test_load_store:
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; CHECK: buffer_load_ushort [[TMP:v[0-9]+]]
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; CHECK: buffer_store_short [[TMP]]
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%val = load half addrspace(1)* %in
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store half %val, half addrspace(1) * %out
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ret void
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}
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define void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) {
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; CHECK-LABEL: {{^}}test_bitcast_from_half:
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; CHECK: buffer_load_ushort [[TMP:v[0-9]+]]
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; CHECK: buffer_store_short [[TMP]]
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%val = load half addrspace(1) * %in
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%val_int = bitcast half %val to i16
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store i16 %val_int, i16 addrspace(1)* %out
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ret void
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}
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define void @test_bitcast_to_half(half addrspace(1)* %out, i16 addrspace(1)* %in) {
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; CHECK-LABEL: {{^}}test_bitcast_to_half:
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; CHECK: buffer_load_ushort [[TMP:v[0-9]+]]
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; CHECK: buffer_store_short [[TMP]]
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%val = load i16 addrspace(1)* %in
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%val_fp = bitcast i16 %val to half
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store half %val_fp, half addrspace(1)* %out
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ret void
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}
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define void @test_extend32(half addrspace(1)* %in, float addrspace(1)* %out) {
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; CHECK-LABEL: {{^}}test_extend32:
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; CHECK: v_cvt_f32_f16_e32
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%val16 = load half addrspace(1)* %in
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%val32 = fpext half %val16 to float
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store float %val32, float addrspace(1)* %out
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ret void
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}
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define void @test_extend64(half addrspace(1)* %in, double addrspace(1)* %out) {
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; CHECK-LABEL: {{^}}test_extend64:
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; CHECK: v_cvt_f32_f16_e32
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; CHECK: v_cvt_f64_f32_e32
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%val16 = load half addrspace(1)* %in
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%val64 = fpext half %val16 to double
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store double %val64, double addrspace(1)* %out
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ret void
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}
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define void @test_trunc32(float addrspace(1)* %in, half addrspace(1)* %out) {
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; CHECK-LABEL: {{^}}test_trunc32:
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; CHECK: v_cvt_f16_f32_e32
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%val32 = load float addrspace(1)* %in
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%val16 = fptrunc float %val32 to half
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store half %val16, half addrspace(1)* %out
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ret void
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}
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