llvm-6502/test/CodeGen
Evan Cheng 3d2125c9db Enable sibling call optimization of libcalls which are expanded during
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 23:55:39 +00:00
..
Alpha
ARM Enable sibling call optimization of libcalls which are expanded during 2010-11-30 23:55:39 +00:00
Blackfin
CBackend
CellSPU Handle lshr for i128 correctly on SPU also when 2010-11-29 14:44:28 +00:00
CPP
Generic Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test. 2010-11-20 07:26:51 +00:00
MBlaze Implement branch analysis in the MBlaze backend. 2010-11-21 21:53:36 +00:00
Mips Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com> 2010-11-12 00:38:32 +00:00
MSP430
PowerPC remove a pointless testcase. 2010-11-15 05:07:03 +00:00
PTX ptx: add command-line options for gpu target and ptx version 2010-11-30 10:14:14 +00:00
SPARC filecheckize 2010-11-23 02:26:52 +00:00
SystemZ
Thumb Fix epilogue codegen to avoid leaving the stack pointer in an invalid 2010-11-22 18:12:04 +00:00
Thumb2 Fix epilogue codegen to avoid leaving the stack pointer in an invalid 2010-11-22 18:12:04 +00:00
X86 Enable sibling call optimization of libcalls which are expanded during 2010-11-30 23:55:39 +00:00
XCore
thumb2-mul.ll