Tom Stellard 5aee09da12 R600: Add SI load support for v[24]i32 and store for v2i32 ... Also add a seperate vector lit test file, since r600 doesn't seem to handle v2i32 load/store yet, but we can test both for SI. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184021 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-15 00:09:31 +00:00
..
InstPrinter
MCTargetDesc	R600: Use correct encoding for Vertex Fetch instructions on Cayman	2013-06-14 22:12:30 +00:00
TargetInfo
AMDGPU.h	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPU.td	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp	R600: Fix calculation of stack offset in AMDGPUFrameLowering	2013-06-07 20:52:05 +00:00
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
AMDGPUInstrInfo.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.td
AMDGPUStructurizeCFG.cpp
AMDGPUSubtarget.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUSubtarget.h	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUTargetMachine.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDGPUTargetMachine.h
AMDILBase.td
AMDILCFGStructurizer.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDILInstrInfo.td	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp	R600: Don't try to fix reg class when copying IMPLICIT_DEF to a register	2013-06-13 20:14:00 +00:00
AMDILISelLowering.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
AMDILRegisterInfo.td
CMakeLists.txt	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
LLVMBuild.txt
Makefile
Processors.td	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
R600ControlFlowFinalizer.cpp	R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman	2013-06-14 22:12:24 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600ExpandSpecialInstrs.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600InstrFormats.td	R600: Use correct encoding for Vertex Fetch instructions on Cayman	2013-06-14 22:12:30 +00:00
R600InstrInfo.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
R600InstrInfo.h	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
R600Instructions.td	R600: Use correct encoding for Vertex Fetch instructions on Cayman	2013-06-14 22:12:30 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Make helper functions static.	2013-06-11 13:32:25 +00:00
R600ISelLowering.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp	R600: Use a refined heuristic to choose when switching clause	2013-06-07 23:30:34 +00:00
R600MachineScheduler.h	R600: Use a refined heuristic to choose when switching clause	2013-06-07 23:30:34 +00:00
R600OptimizeVectorRegisters.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600RegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
SIDefines.h
SIInsertWaits.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SIInstrFormats.td
SIInstrInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SIInstrInfo.h
SIInstrInfo.td
SIInstructions.td	R600: Add SI load support for v[24]i32 and store for v2i32	2013-06-15 00:09:31 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600: Rework subtarget info and remove AMDILDevice classes	2013-06-07 20:37:48 +00:00
SIISelLowering.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SILowerControlFlow.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SIRegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 20:28:55 +00:00
SIRegisterInfo.td
SISchedule.td