Jim Grosbach 53e3fc463e Use TableGen'erated pseudo lowering for ARM. ... Hook up the TableGen lowering for simple pseudo instructions for ARM and use it for a subset of the many pseudos the backend has as proof of concept. More conversions to come. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134705 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-08 17:40:42 +00:00
..
Analysis	Preserve debug loc.	2011-07-05 21:48:22 +00:00
Archive	Revert PathV2 changes, as sys::fs::unique_file is not finished yet.	2011-03-01 19:50:55 +00:00
AsmParser	Replace the existing forms of ConstantArray::get() with a single form	2011-06-22 09:24:39 +00:00
Bitcode	type can be null	2011-07-07 05:29:18 +00:00
CodeGen	Refactor.	2011-07-08 17:09:57 +00:00
CompilerDriver	Build CompilerDriver library.	2011-03-12 22:01:42 +00:00
ExecutionEngine	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
Linker	Set the unnamed_addr only when we're creating a new GV in the dest module.	2011-03-29 23:31:06 +00:00
MC	Eliminate asm parser's dependency on TargetMachine:	2011-07-08 01:53:10 +00:00
Object	Use memcmp.	2011-07-05 20:28:00 +00:00
Support	Recognize mipseb as alias for mips for symmetry with mipsel.	2011-07-07 16:53:52 +00:00
Target	Use TableGen'erated pseudo lowering for ARM.	2011-07-08 17:40:42 +00:00
Transforms	Make GVN look through extractvalues for recognised intrinsics. GVN can then CSE ops that match values produced by the intrinsics.	2011-07-08 01:50:54 +00:00
VMCore	Introduce "expect" intrinsic instructions.	2011-07-06 18:22:43 +00:00
CMakeLists.txt	Build CompilerDriver library.	2011-03-12 22:01:42 +00:00
Makefile