mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-18 10:31:57 +00:00
550b1e59c4
the old condition to a one bit value. The incoming value must have been promoted, and the top bits are undefined. This causes us to generate: _test: rlwinm r2, r3, 0, 31, 31 li r3, 17 cmpwi cr0, r2, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r3, 1 .LBB_test_2: ; blr instead of: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r2, 1 .LBB_test_2: ; or r3, r2, r2 blr for: int %test(bool %c) { %retval = select bool %c, int 17, int 1 ret int %retval } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
LegalizeDAG.cpp | ||
Makefile | ||
ScheduleDAG.cpp | ||
SelectionDAG.cpp | ||
SelectionDAGISel.cpp | ||
SelectionDAGPrinter.cpp | ||
TargetLowering.cpp |