llvm-6502/lib/CodeGen/SelectionDAG
Chris Lattner 550b1e59c4 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 18:03:09 +00:00
..
LegalizeDAG.cpp When legalizing brcond ->brcc or select -> selectcc, make sure to truncate 2005-08-21 18:03:09 +00:00
Makefile
ScheduleDAG.cpp fix bogus warning 2005-08-20 18:07:27 +00:00
SelectionDAG.cpp Add support for TargetGlobalAddress nodes 2005-08-19 22:31:04 +00:00
SelectionDAGISel.cpp Enable critical edge splitting by default 2005-08-18 17:35:14 +00:00
SelectionDAGPrinter.cpp Print physreg register nodes with target names (e.g. F1) instead of numbers 2005-08-19 21:21:16 +00:00
TargetLowering.cpp For: memory operations -> stores 2005-07-19 04:52:44 +00:00