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557c3631d3
llvm-6502
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include
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llvm
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CodeGen
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Christopher Lamb
557c3631d3
Add selection DAG nodes for subreg insert/extract. PR1350
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@40516
91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 07:34:40 +00:00
..
AsmPrinter.h
EmitAlignment() also emits optional fill value.
2007-07-25 23:35:07 +00:00
CallingConvLower.h
DwarfWriter.h
ELFRelocation.h
FileWriters.h
IntrinsicLowering.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalAnalysis.h
LiveVariables.h
Don't assume that only Uses can be kills. Defs are marked as kills initially
2007-07-20 23:17:34 +00:00
MachineBasicBlock.h
MachineCodeEmitter.h
MachineConstantPool.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionPass.h
MachineInstr.h
Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands.
2007-07-26 07:00:46 +00:00
MachineInstrBuilder.h
Fix 80 col violation.
2007-07-26 07:03:08 +00:00
MachineJumpTableInfo.h
MachineLocation.h
MachineModuleInfo.h
Long live the exception handling!
2007-07-14 14:06:15 +00:00
MachinePassRegistry.h
MachineRelocation.h
MachORelocation.h
Passes.h
Skeleton of post-RA scheduler; doesn't do anything yet.
2007-07-13 17:13:54 +00:00
RegAllocRegistry.h
RegisterScavenging.h
RuntimeLibcalls.h
SchedGraphCommon.h
ScheduleDAG.h
SchedulerRegistry.h
SelectionDAG.h
SelectionDAGISel.h
Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.
2007-07-24 23:00:27 +00:00
SelectionDAGNodes.h
Add selection DAG nodes for subreg insert/extract. PR1350
2007-07-26 07:34:40 +00:00
SimpleRegisterCoalescing.h
SSARegMap.h
ValueTypes.h
Add support for 3 element 32-bit vector ValueTypes.
2007-07-26 01:46:52 +00:00
ValueTypes.td
Fix comments for new types.
2007-07-26 01:48:57 +00:00