Dan Gohman 14ea1ec232 Fix FastISel's assumption that i1 values are always zero-extended ... by inserting explicit zero extensions where necessary. Included is a testcase where SelectionDAG produces a virtual register holding an i1 value which FastISel previously mistakenly assumed to be zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8		2009-03-13 20:42:20 +00:00
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llvm	Fix FastISel's assumption that i1 values are always zero-extended	2009-03-13 20:42:20 +00:00
llvm-c	It makes no sense to have a ODR version of common	2009-03-11 20:14:15 +00:00