Dan Gohman 14ea1ec232 Fix FastISel's assumption that i1 values are always zero-extended ... by inserting explicit zero extensions where necessary. Included is a testcase where SelectionDAG produces a virtual register holding an i1 value which FastISel previously mistakenly assumed to be zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8		2009-03-13 20:42:20 +00:00
..
Analysis	Second installment of "BasicBlock operands to the back"	2009-03-13 18:27:29 +00:00
Archive
AsmParser
Bitcode	Second installment of "BasicBlock operands to the back"	2009-03-13 18:27:29 +00:00
CodeGen	Fix FastISel's assumption that i1 values are always zero-extended	2009-03-13 20:42:20 +00:00
CompilerDriver
Debugger	Oops...I committed too much.	2009-03-13 04:39:26 +00:00
ExecutionEngine	Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.	2009-03-13 07:51:59 +00:00
Linker
Support	just initialize the first element, we don't need to set the rest to zeros.	2009-03-13 00:24:01 +00:00
System
Target	Fix FastISel's assumption that i1 values are always zero-extended	2009-03-13 20:42:20 +00:00
Transforms	One more place where debug info affects codegen.	2009-03-13 19:23:20 +00:00
VMCore	Second installment of "BasicBlock operands to the back"	2009-03-13 18:27:29 +00:00
Makefile