Nate Begeman 56eb86806d Add support for AssertSext and AssertZext, folding other extensions with ... them. This allows for elminination of redundant extends in the entry blocks of functions on PowerPC. Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs to ISD::MUL in ExpandOp are actually just extended i32 values and not real i64 values. this allows us to codegen int mulhs(int a, int b) { return ((long long)a * b) >> 32; } as: _mulhs: mulhw r3, r4, r3 blr instead of: _mulhs: mulhwu r2, r4, r3 srawi r5, r3, 31 mullw r5, r4, r5 add r2, r2, r5 srawi r4, r4, 31 mullw r3, r4, r3 add r3, r2, r3 blr with a similar improvement on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23147 91177308-0d34-0410-b5e6-96231b3b80d8		2005-08-30 02:44:00 +00:00
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Analysis	floor/ceil don't read/write memory. This allows gcse to eliminate 6 calls	2005-08-24 16:58:56 +00:00
Archive	Final Changes For PR495:	2005-07-08 03:08:58 +00:00
AsmParser	Implement PR614:	2005-08-27 18:50:39 +00:00
Bytecode	Culling out use of unions for converting FP to bits and vice versa.	2005-08-17 19:34:49 +00:00
CodeGen	Add support for AssertSext and AssertZext, folding other extensions with	2005-08-30 02:44:00 +00:00
Debugger	For PR495:	2005-07-07 23:21:43 +00:00
ExecutionEngine	one cannot allocate a global, until one is done initializing the global pointers	2005-08-01 17:35:40 +00:00
Linker	For PR495:	2005-07-07 23:21:43 +00:00
Support	Allow bugpoint+PPC codegen to use fsqrt	2005-08-29 13:14:24 +00:00
System	For PR616:	2005-08-24 10:07:20 +00:00
Target	Make sure the selector emits register register copies with flag operands	2005-08-30 01:57:02 +00:00
Transforms	Fix Regression/Transforms/Reassociate/2005-08-24-Crash.ll	2005-08-24 17:55:32 +00:00
VMCore	add printer support for flag operands	2005-08-25 17:59:23 +00:00
Makefile	Add the Linker library	2004-11-14 21:54:41 +00:00