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56eb86806d
them. This allows for elminination of redundant extends in the entry blocks of functions on PowerPC. Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs to ISD::MUL in ExpandOp are actually just extended i32 values and not real i64 values. this allows us to codegen int mulhs(int a, int b) { return ((long long)a * b) >> 32; } as: _mulhs: mulhw r3, r4, r3 blr instead of: _mulhs: mulhwu r2, r4, r3 srawi r5, r3, 31 mullw r5, r4, r5 add r2, r2, r5 srawi r4, r4, 31 mullw r3, r4, r3 add r3, r2, r3 blr with a similar improvement on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23147 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
SelectionDAG | ||
AsmPrinter.cpp | ||
BranchFolding.cpp | ||
ELFWriter.cpp | ||
IntrinsicLowering.cpp | ||
LiveInterval.cpp | ||
LiveInterval.h | ||
LiveIntervalAnalysis.cpp | ||
LiveIntervalAnalysis.h | ||
LiveVariables.cpp | ||
MachineBasicBlock.cpp | ||
MachineCodeEmitter.cpp | ||
MachineFunction.cpp | ||
MachineInstr.cpp | ||
Makefile | ||
Passes.cpp | ||
PHIElimination.cpp | ||
PhysRegTracker.h | ||
PrologEpilogInserter.cpp | ||
RegAllocIterativeScan.cpp | ||
RegAllocLinearScan.cpp | ||
RegAllocLocal.cpp | ||
RegAllocSimple.cpp | ||
TwoAddressInstructionPass.cpp | ||
UnreachableBlockElim.cpp | ||
VirtRegMap.cpp | ||
VirtRegMap.h |