Chris Lattner 571e434a34 Turn conditions like x<Y|z==q into multiple blocks. ... This compiles Regression/CodeGen/X86/or-branch.ll into: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $5, %eax jl LBB1_1 #cond_true LBB1_3: #entry testl %ecx, %ecx jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret instead of: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $4, %eax setg %al testl %ecx, %ecx setne %cl testb %cl, %al jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret And on ppc to: cmpwi cr0, r29, 5 blt cr0, LBB1_1 ;cond_true LBB1_3: ;entry cmplwi cr0, r30, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r30, r4, r3 rlwinm r29, r2, 30, 31, 31 and r2, r29, r30 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8		2006-10-27 21:36:01 +00:00
..
SelectionDAG	Turn conditions like x<Y|z==q into multiple blocks.	2006-10-27 21:36:01 +00:00
AsmPrinter.cpp	Move getPreferredAlignmentLog from AsmPrinter to TargetData	2006-10-24 20:32:14 +00:00
BranchFolding.cpp	simplify code	2006-10-25 22:21:37 +00:00
DwarfWriter.cpp	Tighter data structure for deleted debug labels.	2006-10-24 11:50:43 +00:00
ELFWriter.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
IntrinsicLowering.cpp	For PR950:	2006-10-20 07:07:24 +00:00
LiveInterval.cpp	When joining two intervals where the RHS is really simple, use a light-weight	2006-09-02 05:26:59 +00:00
LiveIntervalAnalysis.cpp	Keep track of the start of MBB's in a separate map from instructions. This	2006-09-15 03:57:23 +00:00
LiveVariables.cpp	Fix for PR929. The PHI nodes were being gone through for each instruction	2006-10-03 07:20:20 +00:00
LLVMTargetMachine.cpp	Don't do dead block elimination in fast mode.	2006-10-24 16:11:49 +00:00
MachineBasicBlock.cpp	add moveBefore/moveAfter helper methods	2006-10-24 00:02:26 +00:00
MachineDebugInfo.cpp	Tighter data structure for deleted debug labels.	2006-10-24 11:50:43 +00:00
MachineFunction.cpp	Bugfixes	2006-10-03 20:19:23 +00:00
MachineInstr.cpp	be more aggressive about matching identical instructions.	2006-10-25 18:08:14 +00:00
MachinePassRegistry.cpp	Final polish on machine pass registries.	2006-08-02 12:30:23 +00:00
MachOWriter.cpp	Behold, more work on relocations. Things are looking pretty good now.	2006-09-10 23:03:44 +00:00
Makefile	Fix linking on Alpha	2006-07-20 17:27:58 +00:00
Passes.cpp	Work around a bug in gcc 3.3.5, reported by a user	2006-08-03 00:16:56 +00:00
PHIElimination.cpp	"Once more into the breach, dear friends, once more, or fill the wall up	2006-09-28 07:10:24 +00:00
PhysRegTracker.h	Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr	2004-02-23 06:10:13 +00:00
PrologEpilogInserter.cpp	TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.	2006-09-28 18:52:32 +00:00
RegAllocLinearScan.cpp	LinearScanner hotspot.	2006-10-24 14:35:25 +00:00
RegAllocLocal.cpp	Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not	2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp	eliminate RegisterOpt. It does the same thing as RegisterPass.	2006-08-27 22:42:52 +00:00
VirtRegMap.cpp	restore my previous patch, now that the X86 backend bug has been fixed:	2006-10-12 17:45:38 +00:00
VirtRegMap.h	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00