llvm-6502/test/CodeGen/Mips/selectcc.ll
Andrew Trick 81349a7435 Track IR ordering of SelectionDAG nodes 4/4.
Unit test cases for -pre-RA-sched=source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 03:26:51 +00:00

44 lines
1.1 KiB
LLVM

; RUN: llc -march=mipsel < %s
; RUN: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED
@gf0 = external global float
@gf1 = external global float
@gd0 = external global double
@gd1 = external global double
define float @select_cc_f32(float %a, float %b) nounwind {
entry:
; SOURCE-SCHED: lui
; SOURCE-SCHED: addiu
; SOURCE-SCHED: addu
; SOURCE-SCHED: lw
; SOURCE-SCHED: sw
; SOURCE-SCHED: lw
; SOURCE-SCHED: lui
; SOURCE-SCHED: sw
; SOURCE-SCHED: addiu
; SOURCE-SCHED: addiu
; SOURCE-SCHED: c.olt.s
; SOURCE-SCHED: movt
; SOURCE-SCHED: mtc1
; SOURCE-SCHED: jr
store float 0.000000e+00, float* @gf0, align 4
store float 1.000000e+00, float* @gf1, align 4
%cmp = fcmp olt float %a, %b
%conv = zext i1 %cmp to i32
%conv1 = sitofp i32 %conv to float
ret float %conv1
}
define double @select_cc_f64(double %a, double %b) nounwind {
entry:
store double 0.000000e+00, double* @gd0, align 8
store double 1.000000e+00, double* @gd1, align 8
%cmp = fcmp olt double %a, %b
%conv = zext i1 %cmp to i32
%conv1 = sitofp i32 %conv to double
ret double %conv1
}