Andrew Trick ff7e4b11b1 Disabled subregister copy coalescing during MachineCSE. ... This effectively backs out r197465 but leaves some of the general fixes in place. Not all targets are ready to handle this feature. To enable it, some infrastructure work is needed to better handle register class constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197514 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-17 19:29:36 +00:00
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AArch64	[AArch64]Fix the pattern match failure for v1i8/v1i16/v1i32 types.	2013-12-16 02:51:28 +00:00
ARM	Add warning capabilities in LLVM.	2013-12-17 17:47:22 +00:00
CPP
Generic	Fix pr18235.	2013-12-13 16:05:32 +00:00
Hexagon
Inputs
Mips	Last change for mips16 prolog/epilog cleanup and optimization.	2013-12-15 20:49:30 +00:00
MSP430
NVPTX	[NVPTX] Fix off-by-one error when creating the VT list for an SDNode	2013-12-05 12:58:00 +00:00
PowerPC	Add a reduced testcase from the recent bootstrap crash.	2013-12-16 21:24:00 +00:00
R600	R600/SI: Minor improvements to test.	2013-12-14 00:38:04 +00:00
SPARC	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
SystemZ	Add -mcpu=z10 to SystemZ tests.	2013-12-17 05:27:16 +00:00
Thumb
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	Disabled subregister copy coalescing during MachineCSE.	2013-12-17 19:29:36 +00:00
XCore