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https://github.com/c64scene-ar/llvm-6502.git
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LLVM backend for 6502
5bbee4b40a
local register allocator's physreg liveness doesn't recognize subregs, so it doesn't know that defs of %ecx that are immediately followed by uses of %cl aren't dead. This comes up due to the way fast-isel emits shift instructions. This is a temporary workaround. Arguably, local regalloc should handle subreg references correctly. On the other hand, perhaps fast-isel should use INSERT_SUBREG instead of just assigning to the most convenient super-register of %cl when lowering shifts. This fixes MultiSource/Benchmarks/MallocBench/espresso, MultiSource/Applications/hexxagon, and others, under -fast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56947 91177308-0d34-0410-b5e6-96231b3b80d8 |
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