Vikram S. Adve b7f06f46a1 Fixed instruction information for RDCCR and WRCCR. ... Fixed selection to create a TmpInstruction for each integer CC register (since it is an implicit side-effect, unlike FP CC registers which are explicit operands). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1120 91177308-0d34-0410-b5e6-96231b3b80d8		2001-11-04 19:34:49 +00:00
..
InstrSched	Allow combinations of True/Anti/Output flags for each edge to	2001-10-28 21:45:02 +00:00
InstrSelection	Minor method rename	2001-11-04 08:08:34 +00:00
LiveVar	No major change - added some comments	2001-10-16 01:25:05 +00:00
RegAlloc	Added an assertion since it seems like AdjList returns an errornous size in method	2001-11-03 22:01:09 +00:00
Makefile	Change Sources specifier to ExtraSources	2001-10-18 01:48:09 +00:00
SparcV9.burg.in	Move the burg file to here. Add .in suffix to indicate that it gets	2001-10-14 17:26:21 +00:00
SparcV9AsmPrinter.cpp	Check in to use moved stringizing code	2001-10-29 13:39:38 +00:00
SparcV9Instr.def	Fixed instruction information for RDCCR and WRCCR.	2001-11-04 19:34:49 +00:00
SparcV9InstrInfo.cpp	Generate SETX for 64-bit integers!	2001-10-28 21:41:46 +00:00
SparcV9InstrSelection.cpp	Fixed instruction information for RDCCR and WRCCR.	2001-11-04 19:34:49 +00:00
SparcV9InstrSelectionSupport.h	Sparc-specific code shared between local files.	2001-10-18 00:03:20 +00:00
SparcV9Internals.h	Fixed instruction information for RDCCR and WRCCR.	2001-11-04 19:34:49 +00:00
SparcV9RegClassInfo.cpp	Added code so that colorIGNode does not unnecessarily reserve unusable	2001-10-19 21:41:16 +00:00
SparcV9RegClassInfo.h	Added code to support correct saving of %ccr across calls	2001-11-03 19:59:59 +00:00
SparcV9RegInfo.cpp	Added code to support correct saving of %ccr across calls	2001-11-03 19:59:59 +00:00
SparcV9TargetMachine.cpp	Added a frame layout class, and code to insert prolog/epilog code.	2001-10-22 13:44:23 +00:00