| .. |
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2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
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2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-26-RegScavengerAssert.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-jumptoentry.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-05-31-RegScavengerInfiniteLoop.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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Remove the local register allocator.
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2010-06-15 21:58:33 +00:00 |
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2008-02-29-RegAllocLocal.ll
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Remove the local register allocator.
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2010-06-15 21:58:33 +00:00 |
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-14-CoalescerBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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Remove the local register allocator.
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2010-06-15 21:58:33 +00:00 |
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-12-RegScavengerAssert.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-06-30-RegScavengerAssert2.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-06-30-RegScavengerAssert3.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-06-30-RegScavengerAssert4.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-06-30-RegScavengerAssert5.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-06-30-RegScavengerAssert.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-07-01-CommuteBug.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-07-22-ScavengerAssert.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-07-22-SchedulerAssert.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-07-29-VFP3Registers.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-02-RegScavengerAssert-Neon.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-04-RegScavengerAssert-2.ll
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Set the mtriple in some tests so that they use AAPCS.
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2010-06-15 20:42:00 +00:00 |
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2009-08-04-RegScavengerAssert.ll
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Set the mtriple in some tests so that they use AAPCS.
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2010-06-15 20:42:00 +00:00 |
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2009-08-15-RegScavenger-EarlyClobber.ll
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Set the mtriple in some tests so that they use AAPCS.
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2010-06-15 20:42:00 +00:00 |
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2009-08-15-RegScavengerAssert.ll
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Set the mtriple in some tests so that they use AAPCS.
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2010-06-15 20:42:00 +00:00 |
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2009-08-21-PostRAKill2.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-21-PostRAKill3.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-21-PostRAKill4.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-21-PostRAKill.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-27-ScalarToVector.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-29-ExtractEltf32.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-29-TooLongSplat.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-31-LSDA-Name.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-08-31-TwoRegShuffle.ll
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2009-09-01-PostRAProlog.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-09-09-AllOnes.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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Remove the arm_aapcscc marker from the tests. It is the default
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2010-06-15 19:04:29 +00:00 |
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2009-10-02-NEONSubregsBug.ll
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2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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Remove the arm_aapcscc marker from the tests. It is the default
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2010-06-15 19:04:29 +00:00 |
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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Generalize the pre-coalescing of extract_subregs feeding reg_sequences,
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2010-06-15 05:56:31 +00:00 |
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2009-11-02-NegativeLane.ll
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Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
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2010-05-21 21:05:32 +00:00 |
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-04-13-v2f64SplitArg.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-04-14-SplitVector.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-04-15-ScavengerDebugValue.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-05-14-IllegalType.ll
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2010-05-17-DAGCombineAssert.ll
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FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
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2010-05-18 00:03:40 +00:00 |
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2010-05-17-FastAllocCrash.ll
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Avoid allocating the same physreg to multiple virtregs in one instruction.
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2010-05-17 17:18:59 +00:00 |
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2010-05-18-LocalAllocCrash.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-05-18-PostIndexBug.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-05-19-Shuffles.ll
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Handle Neon v2f64 and v2i64 vector shuffles as register copies.
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2010-05-20 18:39:53 +00:00 |
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2010-05-20-NEONSpillCrash.ll
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Add a -regalloc=default option that chooses a register allocator based on the -O
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2010-05-27 23:57:25 +00:00 |
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2010-05-21-BuildVector.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-06-11-vmovdrr-bitcast.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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2010-06-21-LdStMultipleBug.ll
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Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores which have already been processed.
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2010-06-21 21:21:14 +00:00 |
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2010-06-21-nondarwin-tc.ll
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Add missing FileCheck call.
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2010-06-21 18:46:08 +00:00 |
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2010-06-25-Thumb2ITInvalidIterator.ll
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Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This was
|
2010-06-25 23:14:54 +00:00 |
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2010-06-28-DAGCombineUndef.ll
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Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they
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2010-06-28 23:40:25 +00:00 |
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addrmode.ll
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aliases.ll
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align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm-asm.ll
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arm-frameaddr.ll
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Remove the arm_aapcscc marker from the tests. It is the default
|
2010-06-15 19:04:29 +00:00 |
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arm-negative-stride.ll
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arm-returnaddr.ll
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Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.
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2010-06-22 22:04:24 +00:00 |
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armv4.ll
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Remove the arm_aapcscc marker from the tests. It is the default
|
2010-06-15 19:04:29 +00:00 |
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bfc.ll
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bfx.ll
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bic.ll
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bits.ll
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bx_fold.ll
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call_nolink.ll
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call-tc.ll
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Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.
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2010-06-19 01:01:32 +00:00 |
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call.ll
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Remove a tail call, and move some CHECKs to the
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2010-06-04 01:01:04 +00:00 |
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carry.ll
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clz.ll
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compare-call.ll
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constants.ll
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crash-O0.ll
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When using ADDri to get the address of a stack object, 255 is a conservative
|
2010-06-18 20:59:25 +00:00 |
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cse-libcalls.ll
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ctors_dtors.ll
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ctz.ll
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dg.exp
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div.ll
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dyn-stackalloc.ll
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extloadi1.ll
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fabss.ll
|
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fadds.ll
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Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fcopysign.ll
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fdivs.ll
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Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fixunsdfdi.ll
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flag-crash.ll
|
It's possible that a flag is added to the SDNode that points back to the
|
2010-06-24 22:00:37 +00:00 |
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fmacs.ll
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Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fmdrr-fmrrd.ll
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fmscs.ll
|
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fmuls.ll
|
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fnegs.ll
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fnmacs.ll
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fnmscs.ll
|
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
|
2010-05-21 00:43:17 +00:00 |
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fnmul.ll
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fnmuls.ll
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formal.ll
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fp16.ll
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fp_convert.ll
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fp.ll
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fparith.ll
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fpcmp_ueq.ll
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fpcmp.ll
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fpconsts.ll
|
Remove arm_apcscc from the test files. It is the default and doing this
|
2010-06-17 15:18:27 +00:00 |
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fpconv.ll
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fpmem.ll
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fpow.ll
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fpowi.ll
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fptoint.ll
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fsubs.ll
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globals.ll
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hardfloat_neon.ll
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hello.ll
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hidden-vis-2.ll
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hidden-vis-3.ll
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hidden-vis.ll
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iabs.ll
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ifcvt1.ll
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ifcvt2.ll
|
Allow ARM if-converter to be run after post allocation scheduling.
|
2010-06-18 23:09:54 +00:00 |
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ifcvt3.ll
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ifcvt4.ll
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ifcvt5.ll
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ifcvt6.ll
|
Reinstate correct test, remove the real invalidated test.
|
2010-06-23 18:56:06 +00:00 |
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ifcvt7.ll
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ifcvt8.ll
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ifcvt9.ll
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illegal-vector-bitcast.ll
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imm.ll
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indirectbr.ll
|
Remove arm_apcscc from the test files. It is the default and doing this
|
2010-06-17 15:18:27 +00:00 |
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inlineasm2.ll
|
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inlineasm3.ll
|
Remove arm_apcscc from the test files. It is the default and doing this
|
2010-06-17 15:18:27 +00:00 |
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inlineasm-imm-arm.ll
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inlineasm.ll
|
llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.
|
2010-05-27 22:08:38 +00:00 |
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insn-sched1.ll
|
Remove more tail calls.
|
2010-06-04 01:01:24 +00:00 |
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ispositive.ll
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large-stack.ll
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ldm.ll
|
Remove more tail calls.
|
2010-06-04 01:01:24 +00:00 |
|
ldr_ext.ll
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ldr_frame.ll
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ldr_post.ll
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ldr_pre.ll
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ldr.ll
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ldrd.ll
|
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load.ll
|
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long_shift.ll
|
Teach EmitLiveInCopies to omit copies for unused virtual registers,
|
2010-06-24 22:23:02 +00:00 |
|
long-setcc.ll
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long.ll
|
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lsr-code-insertion.ll
|
Change if-conversion block size limit checks to add some flexibility.
|
2010-06-25 22:42:03 +00:00 |
|
lsr-on-unrolled-loops.ll
|
We are missing opportunites to use ldm. Take code like this:
|
2010-06-23 23:00:16 +00:00 |
|
lsr-scale-addr-mode.ll
|
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|
machine-cse-cmp.ll
|
Re-apply 105308 with fix.
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2010-06-04 23:28:13 +00:00 |
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mem.ll
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memcpy-inline.ll
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memfunc.ll
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mls.ll
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movt-movw-global.ll
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movt.ll
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mul_const.ll
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Some cheap DAG combine goodness for multiplication with a particular constant.
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2010-05-15 18:16:59 +00:00 |
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mul.ll
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mulhi.ll
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mvn.ll
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neon_arith1.ll
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neon_ld1.ll
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neon_ld2.ll
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neon_minmax.ll
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pack.ll
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pr3502.ll
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private.ll
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reg_sequence.ll
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Eliminate the other half of the BRCOND optimization, and update
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2010-06-24 15:24:03 +00:00 |
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remat.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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ret0.ll
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ret_arg1.ll
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ret_arg2.ll
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ret_arg3.ll
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ret_arg4.ll
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ret_arg5.ll
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ret_f32_arg2.ll
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ret_f32_arg5.ll
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ret_f64_arg2.ll
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ret_f64_arg_reg_split.ll
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ret_f64_arg_split.ll
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ret_f64_arg_stack.ll
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ret_i64_arg2.ll
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ret_i64_arg3.ll
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ret_i64_arg_split.ll
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ret_i128_arg2.ll
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ret_void.ll
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rev.ll
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sbfx.ll
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section.ll
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select_xform.ll
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select-imm.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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select.ll
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shifter_operand.ll
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smul.ll
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spill-q.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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stack-frame.ll
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stm.ll
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str_post.ll
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str_pre-2.ll
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str_pre.ll
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str_trunc.ll
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sxt_rot.ll
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t2-imm.ll
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tail-opts.ll
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thread_pointer.ll
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tls1.ll
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tls2.ll
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tls3.ll
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trap.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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trunc_ldr.ll
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truncstore-dag-combine.ll
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tst_teq.ll
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uint64tof64.ll
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unaligned_load_store.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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unord.ll
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uxt_rot.ll
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uxtb.ll
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va_arg.ll
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When splitting a VAARG, remember its alignment.
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2010-06-26 18:22:20 +00:00 |
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vaba.ll
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vabd.ll
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vabs.ll
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vadd.ll
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vargs_align.ll
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vargs.ll
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vbits.ll
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vbsl.ll
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vceq.ll
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vcge.ll
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vcgt.ll
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Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
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2010-05-19 01:08:17 +00:00 |
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vcnt.ll
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vcombine.ll
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vcvt.ll
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vdup.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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vext.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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vfcmp.ll
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vfp.ll
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vget_lane.ll
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Replace a big gob of old coalescer logic with the new CoalescerPair class.
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2010-06-24 18:15:01 +00:00 |
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vhadd.ll
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vhsub.ll
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vicmp.ll
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vld1.ll
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vld2.ll
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vld3.ll
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vld4.ll
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vldlane.ll
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vminmax.ll
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vmla.ll
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vmls.ll
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vmov.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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vmul.ll
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vneg.ll
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vpadal.ll
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vpadd.ll
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vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
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vrev.ll
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Remove arm_apcscc from the test files. It is the default and doing this
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2010-06-17 15:18:27 +00:00 |
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vshift.ll
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vshiftins.ll
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vshl.ll
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vshll.ll
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vshrn.ll
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vsra.ll
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vst1.ll
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vst2.ll
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vst3.ll
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vst4.ll
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vstlane.ll
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vsub.ll
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vtbl.ll
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vtrn.ll
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vuzp.ll
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vzip.ll
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weak2.ll
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weak.ll
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