llvm-6502/test/CodeGen
NAKAMURA Takumi c3e48c38bf Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral.
Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host.

FIXME: Add a testcase for big endian target.

FIXME: Ditto on CompileUnit::addConstantFPValue() ?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 14:12:22 +00:00
..
ARM Always use the string pool, even when it makes the .o larger. This may help 2011-10-28 05:29:47 +00:00
CBackend Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 2011-09-26 06:44:27 +00:00
CellSPU Speculatively disable Dan's commits 143177 and 143179 to see if 2011-10-28 09:55:57 +00:00
CPP
Generic Remove the the test which checks the saving of a vector of booleans into memory. 2011-10-16 19:06:06 +00:00
MBlaze Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
Mips Speculatively disable Dan's commits 143177 and 143179 to see if 2011-10-28 09:55:57 +00:00
MSP430 Remove the explicit request for "Latency" scheduling from MSP430, 2011-10-24 17:53:16 +00:00
PowerPC Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
PTX Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
SPARC
Thumb Speculatively disable Dan's commits 143177 and 143179 to see if 2011-10-28 09:55:57 +00:00
Thumb2 ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
X86 Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral. 2011-10-28 14:12:22 +00:00
XCore Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00