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5d088fee7c
llvm-6502/test/CodeGen
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Evan Cheng 5d088fee7c Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. 
e.g. allocating for GR32, bh is not used, updating bl spill weight.                                                                                                        
     bl should get the same spill weight otherwise it will be choosen                                                                                              
     as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 22:57:19 +00:00
..
Alpha
ARM add no-unwind, remove duplicate run line. 2009-03-12 05:56:37 +00:00
CBackend
CellSPU Don't force promotion of return arguments on the callee. 2009-03-17 23:43:59 +00:00
CPP
Generic LSR shouldn't ever try to hack on integer IV's larger than 64-bits. Right now 2009-03-17 23:58:30 +00:00
IA64
Mips
PowerPC Added missing support for widening when splitting an unary op (PR3683) 2009-03-18 06:24:04 +00:00
SPARC
X86 Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. 2009-03-23 22:57:19 +00:00
XCore