llvm-6502/test/CodeGen
Michael Liao 5e6e15caa7 Fix PR10499
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 23:01:03 +00:00
..
AArch64 AArch64: remove ConstantIsland pass & put literals in separate section. 2013-02-15 09:33:43 +00:00
ARM Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
CPP
Generic
Hexagon Hexagon: Expand cttz, ctlz, and ctpop for now. 2013-02-21 19:39:40 +00:00
MBlaze
Mips Expand pseudos/macros for Selt. This is the last of the complex 2013-02-23 03:09:56 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Fix missing relocation for TLS addressing peephole optimization. 2013-02-25 16:44:35 +00:00
R600 R600: Fix for Unigine when MachineSched is enabled 2013-02-21 15:06:59 +00:00
SI
SPARC
Thumb Fix thumbv5e frame lowering assertion failure. 2013-02-20 12:21:33 +00:00
Thumb2 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
X86 Fix PR10499 2013-02-25 23:01:03 +00:00
XCore