llvm-6502/test/CodeGen
Jim Grosbach 5eabdf2601 ARM: Split out cost model vcvt testcases.
They had a separate RUN line already, so may as well be in a separate file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21 23:47:37 +00:00
..
AArch64
ARM ARM: Split out cost model vcvt testcases. 2013-04-21 23:47:37 +00:00
CPP
Generic
Hexagon
Inputs
MBlaze
Mips [mips] Instruction selection patterns for DSP-ASE vector shifts. 2013-04-19 23:21:32 +00:00
MSP430
NVPTX
PowerPC Fix PPC optimizeCompareInstr swapped-sub argument handling 2013-04-19 22:08:38 +00:00
R600 R600: Add pattern for the BFI_INT instruction 2013-04-19 02:11:06 +00:00
SI
SPARC Passing arguments to varags functions under the SPARC v9 ABI. 2013-04-21 21:36:49 +00:00
Thumb
Thumb2
X86 Remove tbaa metadata. 2013-04-21 01:38:25 +00:00
XCore [XCore] Extend test to check positve offsets are folded into addresses. 2013-04-16 20:05:52 +00:00