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5f2180c533
llvm-6502/lib
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Vikram S. Adve 5f2180c533 (1) Added special register class containing (for now) %fsr. 
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:05:23 +00:00
..
Analysis Fix Bug: BasicAA/2003-05-21-GEP-Problem.ll 2003-05-21 20:23:26 +00:00
Archive
AsmParser Fix bugs: 2003-05-21 17:48:56 +00:00
Bytecode Fix bug: Assembler/2003-05-03-BytecodeReaderProblem.llx 2003-05-22 18:35:38 +00:00
CodeGen (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
ExecutionEngine
Linker Fix Bug: Linker/2003-05-15-TypeProblem.ll 2003-05-15 16:30:55 +00:00
Support Add using declarations 2003-05-22 21:59:35 +00:00
Target (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
Transforms Fix bug: InstCombine/2003-05-26-CastMiscompile.ll 2003-05-26 23:41:32 +00:00
VMCore Fix problem with last checkin. 2003-05-25 16:15:32 +00:00
Makefile