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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@411 91177308-0d34-0410-b5e6-96231b3b80d8
170 lines
4.3 KiB
C++
170 lines
4.3 KiB
C++
/* Title: SparcRegClassInfo.h
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Author: Ruchira Sasanka
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Date: Aug 20, 01
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Purpose: Contains the description of integer register class of Sparc
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*/
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#ifndef SPARC_INT_REG_CLASS_H
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#define SPARC_INT_REG_CLASS_H
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#include "llvm/CodeGen/TargetMachine.h"
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#include <string>
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//-----------------------------------------------------------------------------
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// Integer Register Class
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//-----------------------------------------------------------------------------
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// Int register names in same order as enum in class SparcIntRegOrder
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static string const IntRegNames[] =
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{ "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "o7",
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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"i0", "i1", "i2", "i3", "i4", "i5",
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"g0", "i6", "i7", "o6" };
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class SparcIntRegOrder{
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public:
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enum RegsInPrefOrder // colors possible for a LR (in preferred order)
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{
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// --- following colors are volatile across function calls
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// %g0 can't be used for coloring - always 0
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g1, g2, g3, g4, g5, g6, g7, //%g1-%g7
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o0, o1, o2, o3, o4, o5, o7, // %o0-%o5,
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// %o6 is sp,
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// all %0's can get modified by a call
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// --- following colors are NON-volatile across function calls
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l0, l1, l2, l3, l4, l5, l6, l7, // %l0-%l7
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i0, i1, i2, i3, i4, i5, // %i0-%i5: i's need not be preserved
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// %i6 is the fp - so not allocated
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// %i7 is the ret address - can be used if saved
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// max # of colors reg coloring can allocate (NumOfAvailRegs)
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// --- following colors are not available for allocation within this phase
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// --- but can appear for pre-colored ranges
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g0, i6, i7, o6,
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NumOfAllRegs // place holder to count all possilbe colors
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};
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// max # of colors reg coloring can allocate
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static unsigned int const NumOfAvailRegs = g0;
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static unsigned int const StartOfNonVolatileRegs = l0;
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static unsigned int const StartOfAllRegs = g1;
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static const string getRegName(const unsigned reg) {
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assert( reg < NumOfAllRegs );
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return IntRegNames[reg];
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}
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};
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class SparcIntRegClass : public MachineRegClassInfo
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{
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public:
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SparcIntRegClass(unsigned ID)
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: MachineRegClassInfo(0,
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SparcIntRegOrder::NumOfAvailRegs,
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SparcIntRegOrder::NumOfAllRegs)
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{ }
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void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
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};
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//-----------------------------------------------------------------------------
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// Float Register Class
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//-----------------------------------------------------------------------------
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static string const FloatRegNames[] =
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{
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9",
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"f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19",
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"f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29",
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"f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49",
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"f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59",
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"f60", "f61", "f62", "f63"
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};
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class SparcFloatRegOrder{
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public:
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enum RegsInPrefOrder {
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f0, f1, f2, f3, f4, f5, f6, f7, f8, f9,
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f10, f11, f12, f13, f14, f15, f16, f17, f18, f19,
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f20, f21, f22, f23, f24, f25, f26, f27, f28, f29,
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f30, f31, f32, f33, f34, f35, f36, f37, f38, f39,
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f40, f41, f42, f43, f44, f45, f46, f47, f48, f49,
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f50, f51, f52, f53, f54, f55, f56, f57, f58, f59,
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f60, f61, f62, f63
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};
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// there are 64 regs alltogether but only 32 regs can be allocated at
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// a time.
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static unsigned int const NumOfAvailRegs = 32;
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static unsigned int const NumOfAllRegs = 64;
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static unsigned int const StartOfNonVolatileRegs = f6;
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static unsigned int const StartOfAllRegs = f0;
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static const string getRegName(const unsigned reg) {
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assert( reg < NumOfAllRegs );
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return FloatRegNames[reg];
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}
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};
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class SparcFloatRegClass : public MachineRegClassInfo
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{
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private:
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int findFloatColor(const IGNode *const Node, unsigned Start,
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unsigned End, bool IsColorUsedArr[] ) const;
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public:
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SparcFloatRegClass(unsigned ID)
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: MachineRegClassInfo(1,
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SparcFloatRegOrder::NumOfAvailRegs,
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SparcFloatRegOrder::NumOfAllRegs)
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{ }
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void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
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};
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#endif
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