Louis Gerbarg 5fb3c84898 Retain alignment requirements for load->selects modified by DAGCombine ... DAGCombine may choose to rewrite graphs where two loads feed a select into graphs where a select of two addresses feed a load. While it sanity checks the loads to make sure they are broadly equivalent it currently just uses the alignment restriction of the left node. In cases where the right node has stronger alignment requiresment this may lead to bad codegen, such as generating an aligned load where an unaligned load is required. This patch makes the combine generate a load with an alignment that is the same as whichever is more restrictive of the two alignments. Tests included. rdar://17762530 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214322 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-30 18:24:41 +00:00
..
Analysis	Add @llvm.assume, lowering, and some basic properties	2014-07-25 21:13:35 +00:00
AsmParser	AsmParser: remove deprecated LLIR support	2014-07-23 18:09:31 +00:00
Bitcode	UseListOrder: Visit global values	2014-07-30 17:51:09 +00:00
CodeGen	Retain alignment requirements for load->selects modified by DAGCombine	2014-07-30 18:24:41 +00:00
DebugInfo
ExecutionEngine	[MCJIT] Fix the ARM BR24 relocation in RuntimeDyldMachO.	2014-07-30 03:35:05 +00:00
IR	Feedback on r214189, no functionality change.	2014-07-29 22:58:13 +00:00
IRReader
LineEditor
Linker
LTO	Add the missing hasLinkOnceODRLinkage predicate.	2014-07-30 15:57:51 +00:00
MC	Reapply "DebugInfo: Don't put fission type units in comdat sections."	2014-07-25 17:11:58 +00:00
Object	AArch64: remove arm64 triple enumerator.	2014-07-23 12:32:47 +00:00
Option
ProfileData	llvm-profdata: Clean up and reorganize some tests	2014-07-29 22:29:23 +00:00
Support	Remove dead code.	2014-07-25 19:06:39 +00:00
TableGen
Target	Add BookE's wrtee and wrteei instructions.	2014-07-30 10:32:51 +00:00
Transforms	Add the missing hasLinkOnceODRLinkage predicate.	2014-07-30 15:57:51 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile