Tom Stellard 60fc58262f R600/SI: Handle VGPR64 destination in copyPhysReg(). ... Allows nexuiz to run with radeonsi. Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174655 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-07 19:39:43 +00:00
..
Analysis	Identify and simplify idempotent intrinsics. Test case included.	2013-02-07 19:26:05 +00:00
Archive
AsmParser	Initial submission for the attribute group feature.	2013-02-06 06:52:58 +00:00
Bitcode	Code Custodian (trivial whitespace cleanup)	2013-02-06 22:14:06 +00:00
CodeGen	Clean up multiple skeleton compile units if we have multiple compile	2013-02-06 21:53:56 +00:00
DebugInfo	FDE::dumpHeader(): Forgot to fix one more formatting, ... take two!	2013-02-07 14:54:42 +00:00
ExecutionEngine
IR	Remove extra blank line between closing curly brace and 'else'	2013-02-06 06:50:38 +00:00
Linker
MC	Dwarf: support for LTO where a single object file can have multiple line tables	2013-02-05 21:52:47 +00:00
Object
Option
Support	More MSan/ASan annotations.	2013-02-04 07:03:24 +00:00
TableGen	tblgen: Diagnose duplicate includes.	2013-02-07 04:30:39 +00:00
Target	R600/SI: Handle VGPR64 destination in copyPhysReg().	2013-02-07 19:39:43 +00:00
Transforms	Loop Vectorizer: Refactor Memory Cost Computation	2013-02-07 19:05:21 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile