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https://github.com/c64scene-ar/llvm-6502.git
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6147a7aa17
Add a hook to find out how the target handles shift amounts that are out of range. Either they are undefined (the default), they mask the shift amount to the size of the register (X86, Alpha, etc), or they extend the shift (PPC). This defaults to undefined, which is conservatively correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19676 91177308-0d34-0410-b5e6-96231b3b80d8
332 lines
14 KiB
C++
332 lines
14 KiB
C++
//===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes how to lower LLVM code to machine code. This has two
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// main components:
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//
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// 1. Which ValueTypes are natively supported by the target.
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// 2. Which operations are supported for supported ValueTypes.
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//
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// In addition it has a few other components, like information about FP
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// immediates.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETLOWERING_H
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#define LLVM_TARGET_TARGETLOWERING_H
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#include "llvm/Type.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include <vector>
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namespace llvm {
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class Function;
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class TargetMachine;
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class TargetData;
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class TargetRegisterClass;
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class SDNode;
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class SDOperand;
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class SelectionDAG;
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//===----------------------------------------------------------------------===//
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/// TargetLowering - This class defines information used to lower LLVM code to
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/// legal SelectionDAG operators that the target instruction selector can accept
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/// natively.
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///
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/// This class also defines callbacks that targets must implement to lower
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/// target-specific constructs to SelectionDAG operators.
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///
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class TargetLowering {
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public:
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/// LegalizeAction - This enum indicates whether operations are valid for a
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/// target, and if not, what action should be used to make them valid.
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enum LegalizeAction {
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Legal, // The target natively supports this operation.
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Promote, // This operation should be executed in a larger type.
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Expand, // Try to expand this to other ops, otherwise use a libcall.
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Custom, // Use the LowerOperation hook to implement custom lowering.
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};
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enum OutOfRangeShiftAmount {
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Undefined, // Oversized shift amounts are undefined (default).
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Mask, // Shift amounts are auto masked (anded) to value size.
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Extend, // Oversized shift pulls in zeros or sign bits.
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};
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TargetLowering(TargetMachine &TM);
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virtual ~TargetLowering();
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TargetMachine &getTargetMachine() const { return TM; }
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const TargetData &getTargetData() const { return TD; }
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bool isLittleEndian() const { return IsLittleEndian; }
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MVT::ValueType getPointerTy() const { return PointerTy; }
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MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; }
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MVT::ValueType getSetCCResultTy() const { return SetCCResultTy; }
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OutOfRangeShiftAmount getShiftAmountFlavor() const {return ShiftAmtHandling; }
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/// getRegClassFor - Return the register class that should be used for the
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/// specified value type. This may only be called on legal types.
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TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const {
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TargetRegisterClass *RC = RegClassForVT[VT];
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assert(RC && "This value type is not natively supported!");
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return RC;
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}
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/// hasNativeSupportFor - Return true if the target has native support for the
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/// specified value type. This means that it has a register that directly
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/// holds it without promotions or expansions.
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bool hasNativeSupportFor(MVT::ValueType VT) const {
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return RegClassForVT[VT] != 0;
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}
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/// getTypeAction - Return how we should legalize values of this type, either
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/// it is already legal (return 'Legal') or we need to promote it to a larger
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/// type (return 'Promote'), or we need to expand it into multiple registers
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/// of smaller integer type (return 'Expand'). 'Custom' is not an option.
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LegalizeAction getTypeAction(MVT::ValueType VT) const {
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return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3);
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}
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unsigned getValueTypeActions() const { return ValueTypeActions; }
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/// getTypeToTransformTo - For types supported by the target, this is an
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/// identity function. For types that must be promoted to larger types, this
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/// returns the larger type to promote to. For types that are larger than the
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/// largest integer register, this contains one step in the expansion to get
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/// to the smaller register.
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MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const {
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return TransformToType[VT];
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}
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typedef std::vector<double>::const_iterator legal_fpimm_iterator;
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legal_fpimm_iterator legal_fpimm_begin() const {
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return LegalFPImmediates.begin();
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}
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legal_fpimm_iterator legal_fpimm_end() const {
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return LegalFPImmediates.end();
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}
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/// getOperationAction - Return how this operation should be
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LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const {
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return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3);
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}
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/// hasNativeSupportForOperation - Return true if this operation is legal for
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/// this type.
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///
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bool hasNativeSupportForOperation(unsigned Op, MVT::ValueType VT) const {
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return getOperationAction(Op, VT) == Legal;
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}
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/// getTypeToPromoteTo - If the action for this operation is to promote, this
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/// method returns the ValueType to promote to.
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MVT::ValueType getTypeToPromoteTo(unsigned Op, MVT::ValueType VT) const {
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assert(getOperationAction(Op, VT) == Promote &&
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"This operation isn't promoted!");
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MVT::ValueType NVT = VT;
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do {
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NVT = (MVT::ValueType)(NVT+1);
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assert(MVT::isInteger(NVT) == MVT::isInteger(VT) && NVT != MVT::isVoid &&
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"Didn't find type to promote to!");
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} while (!hasNativeSupportFor(NVT) ||
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getOperationAction(Op, NVT) == Promote);
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return NVT;
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}
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/// getValueType - Return the MVT::ValueType corresponding to this LLVM type.
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/// This is fixed by the LLVM operations except for the pointer size.
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MVT::ValueType getValueType(const Type *Ty) const {
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switch (Ty->getTypeID()) {
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default: assert(0 && "Unknown type!");
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case Type::VoidTyID: return MVT::isVoid;
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case Type::BoolTyID: return MVT::i1;
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case Type::UByteTyID:
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case Type::SByteTyID: return MVT::i8;
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case Type::ShortTyID:
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case Type::UShortTyID: return MVT::i16;
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case Type::IntTyID:
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case Type::UIntTyID: return MVT::i32;
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case Type::LongTyID:
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case Type::ULongTyID: return MVT::i64;
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case Type::FloatTyID: return MVT::f32;
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case Type::DoubleTyID: return MVT::f64;
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case Type::PointerTyID: return PointerTy;
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}
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}
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/// getNumElements - Return the number of registers that this ValueType will
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/// eventually require. This is always one for all non-integer types, is
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/// one for any types promoted to live in larger registers, but may be more
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/// than one for types (like i64) that are split into pieces.
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unsigned getNumElements(MVT::ValueType VT) const {
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return NumElementsForVT[VT];
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}
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//===--------------------------------------------------------------------===//
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// TargetLowering Configuration Methods - These methods should be invoked by
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// the derived class constructor to configure this object for the target.
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//
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protected:
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/// setShiftAmountType - Describe the type that should be used for shift
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/// amounts. This type defaults to the pointer type.
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void setShiftAmountType(MVT::ValueType VT) { ShiftAmountTy = VT; }
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/// setSetCCResultType - Describe the type that shoudl be used as the result
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/// of a setcc operation. This defaults to the pointer type.
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void setSetCCResultType(MVT::ValueType VT) { SetCCResultTy = VT; }
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/// setShiftAmountFlavor - Describe how the target handles out of range shift
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/// amounts.
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void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) {
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ShiftAmtHandling = OORSA;
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}
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/// addRegisterClass - Add the specified register class as an available
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/// regclass for the specified value type. This indicates the selector can
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/// handle values of that class natively.
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void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) {
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AvailableRegClasses.push_back(std::make_pair(VT, RC));
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RegClassForVT[VT] = RC;
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}
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/// computeRegisterProperties - Once all of the register classes are added,
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/// this allows us to compute derived properties we expose.
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void computeRegisterProperties();
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/// setOperationAction - Indicate that the specified operation does not work
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/// with the specified type and indicate what to do about it.
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void setOperationAction(unsigned Op, MVT::ValueType VT,
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LegalizeAction Action) {
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assert(VT < 16 && Op < sizeof(OpActions)/sizeof(OpActions[0]) &&
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"Table isn't big enough!");
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OpActions[Op] |= Action << VT*2;
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}
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/// addLegalFPImmediate - Indicate that this target can instruction select
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/// the specified FP immediate natively.
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void addLegalFPImmediate(double Imm) {
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LegalFPImmediates.push_back(Imm);
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}
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public:
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//===--------------------------------------------------------------------===//
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// Lowering methods - These methods must be implemented by targets so that
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// the SelectionDAGLowering code knows how to lower these.
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//
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/// LowerArguments - This hook must be implemented to indicate how we should
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/// lower the arguments for the specified function, into the specified DAG.
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virtual std::vector<SDOperand>
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LowerArguments(Function &F, SelectionDAG &DAG) = 0;
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/// LowerCallTo - This hook lowers an abstract call to a function into an
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/// actual call. This returns a pair of operands. The first element is the
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/// return value for the function (if RetTy is not VoidTy). The second
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/// element is the outgoing token chain.
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typedef std::vector<std::pair<SDOperand, const Type*> > ArgListTy;
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, SDOperand Callee,
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ArgListTy &Args, SelectionDAG &DAG) = 0;
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/// LowerVAStart - This lowers the llvm.va_start intrinsic. If not
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/// implemented, this method prints a message and aborts.
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virtual std::pair<SDOperand, SDOperand>
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LowerVAStart(SDOperand Chain, SelectionDAG &DAG);
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/// LowerVAEnd - This lowers llvm.va_end and returns the resultant chain. If
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/// not implemented, this defaults to a noop.
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virtual SDOperand LowerVAEnd(SDOperand Chain, SDOperand L, SelectionDAG &DAG);
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/// LowerVACopy - This lowers llvm.va_copy and returns the resultant
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/// value/chain pair. If not implemented, this defaults to returning the
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/// input operand.
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virtual std::pair<SDOperand,SDOperand>
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LowerVACopy(SDOperand Chain, SDOperand L, SelectionDAG &DAG);
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/// LowerVAArgNext - This lowers the vaarg and vanext instructions (depending
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/// on whether the first argument is true). If not implemented, this prints a
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/// message and aborts.
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virtual std::pair<SDOperand,SDOperand>
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LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
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const Type *ArgTy, SelectionDAG &DAG);
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/// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or
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/// llvm.frameaddress (depending on the value of the first argument). The
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/// return values are the result pointer and the resultant token chain. If
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/// not implemented, both of these intrinsics will return null.
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virtual std::pair<SDOperand, SDOperand>
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LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
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SelectionDAG &DAG);
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/// LowerOperation - For operations that are unsupported by the target, and
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/// which are registered to use 'custom' lowering. This callback is invoked.
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/// If the target has no operations that require custom lowering, it need not
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/// implement this. The default implementation of this aborts.
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virtual SDOperand LowerOperation(SDOperand Op);
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private:
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TargetMachine &TM;
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const TargetData &TD;
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/// IsLittleEndian - True if this is a little endian target.
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///
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bool IsLittleEndian;
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/// PointerTy - The type to use for pointers, usually i32 or i64.
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///
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MVT::ValueType PointerTy;
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/// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever
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/// PointerTy is.
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MVT::ValueType ShiftAmountTy;
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OutOfRangeShiftAmount ShiftAmtHandling;
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/// SetCCResultTy - The type that SetCC operations use. This defaults to the
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/// PointerTy.
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MVT::ValueType SetCCResultTy;
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/// RegClassForVT - This indicates the default register class to use for
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/// each ValueType the target supports natively.
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TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
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unsigned char NumElementsForVT[MVT::LAST_VALUETYPE];
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/// ValueTypeActions - This is a bitvector that contains two bits for each
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/// value type, where the two bits correspond to the LegalizeAction enum.
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/// This can be queried with "getTypeAction(VT)".
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unsigned ValueTypeActions;
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/// TransformToType - For any value types we are promoting or expanding, this
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/// contains the value type that we are changing to. For Expanded types, this
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/// contains one step of the expand (e.g. i64 -> i32), even if there are
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/// multiple steps required (e.g. i64 -> i16). For types natively supported
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/// by the system, this holds the same type (e.g. i32 -> i32).
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MVT::ValueType TransformToType[MVT::LAST_VALUETYPE];
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/// OpActions - For each operation and each value type, keep a LegalizeAction
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/// that indicates how instruction selection should deal with the operation.
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/// Most operations are Legal (aka, supported natively by the target), but
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/// operations that are not should be described. Note that operations on
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/// non-legal value types are not described here.
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unsigned OpActions[128];
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std::vector<double> LegalFPImmediates;
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std::vector<std::pair<MVT::ValueType,
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TargetRegisterClass*> > AvailableRegClasses;
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};
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} // end llvm namespace
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#endif
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