Jyotsna Verma 61b632d9f7 Use multiclass to define store instructions with base+immediate offset ... addressing mode and immediate stored value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169408 91177308-0d34-0410-b5e6-96231b3b80d8		2012-12-05 19:32:03 +00:00
..
args.ll	Use multiclass to define store instructions with base+immediate offset	2012-12-05 19:32:03 +00:00
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll	Use multiclass to define store instructions with base+immediate offset	2012-12-05 19:32:03 +00:00
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
lit.local.cfg
macint.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll	Remove extra MayLoad/MayStore flags from atomic_load/store.	2012-08-28 03:11:32 +00:00
newvaluestore.ll	Porting Hexagon MI Scheduler to the new API.	2012-09-04 14:49:56 +00:00
opt-fabs.ll	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
opt-fneg.ll
postinc-load.ll	test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.	2012-11-14 22:22:37 +00:00
remove_lsr.ll	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
simpletailcall.ll	[Hexagon] Don't mark callee saved registers as clobbered by a tail call	2012-08-13 19:54:01 +00:00
static.ll	Porting Hexagon MI Scheduler to the new API.	2012-09-04 14:49:56 +00:00
struct_args_large.ll
struct_args.ll
vaddh.ll