llvm-6502/test/CodeGen
Evan Cheng 6206124250 Turn on -neon-reg-sequence by default.
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 19:51:20 +00:00
..
Alpha
ARM Turn on -neon-reg-sequence by default. 2010-05-17 19:51:20 +00:00
Blackfin Start function numbering at 0. 2010-04-17 16:29:15 +00:00
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
MBlaze
Mips Start function numbering at 0. 2010-04-17 16:29:15 +00:00
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Only use clairvoyance when defining a register, and then only if it has one use. 2010-05-17 04:50:57 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 Clean up the conditional for handling of sign_extend_inreg based on 2010-05-07 18:34:55 +00:00
X86 Removing as part of previous reversion. 2010-05-16 20:19:40 +00:00
XCore Start function numbering at 0. 2010-04-17 16:29:15 +00:00