Renato Golin 6215f78195 Elide repeated register operand in Thumb1 instructions ... This patch makes the ARM backend transform 3 operand instructions such as 'adds/subs' to the 2 operand version of the same instruction if the first two register operands are the same. Example: 'adds r0, r0, #1' will is transformed to 'adds r0, #1'. Currently for some instructions such as 'adds' if you try to assemble 'adds r0, r0, #8' for thumb v6m the assembler would throw an error message because the immediate cannot be encoded using 3 bits. The backend should be smart enough to transform the instruction to 'adds r0, #8', which allows for larger immediate constants. Patch by Ranjeet Singh. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218521 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-26 16:14:29 +00:00
..
Analysis	Fix assertion in LICM doFinalization()	2014-09-24 16:48:31 +00:00
AsmParser	Make CallingConv::ID an alias of "unsigned".	2014-09-10 18:00:17 +00:00
Bitcode	Do not destroy external linkage when deleting function body	2014-09-23 12:54:19 +00:00
CodeGen	Revert patch ofr218493	2014-09-26 02:28:03 +00:00
DebugInfo	Revert "Store TypeUnits in a SmallVector<DWARFUnitSection> instead of a single DWARFUnitSection."	2014-09-26 12:34:06 +00:00
ExecutionEngine	[MCJIT] Fix some more RuntimeDyld debugging output format specifiers.	2014-09-23 19:20:57 +00:00
IR	DIBuilder: Delete dead code, NFC	2014-09-19 23:17:58 +00:00
IRReader	Pass a && to getLazyBitcodeModule.	2014-09-03 17:31:46 +00:00
LineEditor
Linker	Merge alignment of common GlobalValue.	2014-09-09 17:48:18 +00:00
LTO	LTO: introduce object file-based on-disk module format.	2014-09-18 21:28:49 +00:00
MC	MC: Use @IMGREL instead of @IMGREL32, which we can't parse	2014-09-25 02:09:18 +00:00
Object	Converting object's error_category to a ManagedStatic to avoid static constructors and destructors.	2014-09-19 22:09:18 +00:00
Option	Add an overload of getLastArgNoClaim taking two OptSpecifiers.	2014-09-12 19:42:53 +00:00
ProfileData	llvm-cov: Combine segments that cover the same location	2014-09-25 00:34:18 +00:00
Support	Support: Remove undefined behavior from &raw_ostream::operator<<	2014-09-26 02:48:14 +00:00
TableGen	Refactoring: raw pointer -> unique_ptr	2014-09-25 19:55:58 +00:00
Target	Elide repeated register operand in Thumb1 instructions	2014-09-26 16:14:29 +00:00
Transforms	[asan] don't instrument module CTORs that may be run before asan.module_ctor. This fixes asan running together -coverage	2014-09-24 22:41:55 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile