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https://github.com/c64scene-ar/llvm-6502.git
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19a99df130
The LDS output queue is accessed via the OQAP register. The OQAP register cannot be live across clauses, so if value is written to the output queue, it must be retrieved before the end of the clause. With the machine scheduler, we cannot statisfy this constraint, because it lacks proper alias analysis and it will mark some LDS accesses as having a chain dependency on vertex fetches. Since vertex fetches require a new clauses, the dependency may end up spiltting OQAP uses and defs so the end up in different clauses. See the lds-output-queue.ll test for a more detailed explanation. To work around this issue, we now combine the LDS read and the OQAP copy into one instruction and expand it after register allocation. This patch also adds some checks to the EmitClauseMarker pass, so that it doesn't end a clause with a value still in the output queue and removes AR.X and OQAP handling from the scheduler (AR.X uses and defs were already being expanded post-RA, so the scheduler will never see them). Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194755 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
2.6 KiB
LLVM
59 lines
2.6 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
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; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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@local_memory_two_objects.local_mem0 = internal addrspace(3) unnamed_addr global [4 x i32] zeroinitializer, align 4
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@local_memory_two_objects.local_mem1 = internal addrspace(3) unnamed_addr global [4 x i32] zeroinitializer, align 4
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; EG-CHECK: @local_memory_two_objects
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; Check that the LDS size emitted correctly
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; EG-CHECK: .long 166120
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; EG-CHECK-NEXT: .long 8
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; SI-CHECK: .long 47180
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; SI-CHECK-NEXT: .long 32768
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; We would like to check the the lds writes are using different
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; addresses, but due to variations in the scheduler, we can't do
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; this consistently on evergreen GPUs.
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; EG-CHECK: LDS_WRITE
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; EG-CHECK: LDS_WRITE
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; SI-CHECK: DS_WRITE_B32 0, {{v[0-9]*}}, v[[ADDRW:[0-9]*]]
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; SI-CHECK-NOT: DS_WRITE_B32 0, {{v[0-9]*}}, v[[ADDRW]]
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; GROUP_BARRIER must be the last instruction in a clause
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; EG-CHECK: GROUP_BARRIER
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; EG-CHECK-NEXT: ALU clause
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; Make sure the lds reads are using different addresses.
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; EG-CHECK: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]]
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; EG-CHECK-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]]
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; SI-CHECK: DS_READ_B32 {{v[0-9]+}}, 0, [[ADDRR:v[0-9]+]]
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; SI-CHECK-NOT: DS_READ_B32 {{v[0-9]+}}, 0, [[ADDRR]]
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define void @local_memory_two_objects(i32 addrspace(1)* %out) {
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entry:
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%x.i = call i32 @llvm.r600.read.tidig.x() #0
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%arrayidx = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i
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store i32 %x.i, i32 addrspace(3)* %arrayidx, align 4
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%mul = shl nsw i32 %x.i, 1
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%arrayidx1 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %x.i
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store i32 %mul, i32 addrspace(3)* %arrayidx1, align 4
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%sub = sub nsw i32 3, %x.i
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call void @llvm.AMDGPU.barrier.local()
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%arrayidx2 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %sub
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%0 = load i32 addrspace(3)* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32 addrspace(1)* %out, i32 %x.i
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store i32 %0, i32 addrspace(1)* %arrayidx3, align 4
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%arrayidx4 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %sub
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%1 = load i32 addrspace(3)* %arrayidx4, align 4
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%add = add nsw i32 %x.i, 4
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%arrayidx5 = getelementptr inbounds i32 addrspace(1)* %out, i32 %add
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store i32 %1, i32 addrspace(1)* %arrayidx5, align 4
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() #0
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declare void @llvm.AMDGPU.barrier.local()
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attributes #0 = { readnone }
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