llvm-6502/test/CodeGen
Reid Kleckner 4b70bfc905 Begin adding docs and IR-level support for the inalloca attribute
The inalloca attribute is designed to support passing C++ objects by
value in the Microsoft C++ ABI.  It behaves the same as byval, except
that it always implies that the argument is in memory and that the bytes
are never copied.  This attribute allows the caller to take the address
of an outgoing argument's memory and execute arbitrary code to store
into it.

This patch adds basic IR support, docs, and verification.  It does not
attempt to implement any lowering or fix any possibly broken transforms.

When this patch lands, a complete description of this feature should
appear at http://llvm.org/docs/InAlloca.html .

Differential Revision: http://llvm-reviews.chandlerc.com/D2173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197645 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 02:14:12 +00:00
..
AArch64 [AArch64 NEON]Implment loading vector constant form constant pool. 2013-12-18 06:26:04 +00:00
ARM [aarch32] fix bug 18268: Incorrect condition of vsel 2013-12-18 22:25:17 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Fix pr18235. 2013-12-13 16:05:32 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips Fix a problem with mips16 stubs when calls are transformed during 2013-12-18 23:57:48 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Fix off-by-one error when creating the VT list for an SDNode 2013-12-05 12:58:00 +00:00
PowerPC One ppc32-darwin, a i64 inside a structure can have 32 bit alignment. 2013-12-18 14:35:37 +00:00
R600 R600/SI: Minor improvements to test. 2013-12-14 00:38:04 +00:00
SPARC [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. 2013-12-09 05:13:25 +00:00
SystemZ Revert "Add -mcpu=z10 to SystemZ tests." 2013-12-18 23:04:37 +00:00
Thumb Correctly handle the degenerated triple "thumb". 2013-12-18 21:29:44 +00:00
Thumb2 Enabling thumb2 mode used to force support for armv6t2. Replace this 2013-12-13 11:16:00 +00:00
X86 Disabled subregister copy coalescing during MachineCSE. 2013-12-17 19:29:36 +00:00
XCore XCore target: Make handling of large frames not dependent upon an FP. 2013-12-02 11:05:28 +00:00