llvm-6502/test/CodeGen
Eli Friedman 51864a1d2b Fix run-line, again. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 21:33:03 +00:00
..
Alpha
ARM Fix run-line, again. :( 2011-04-29 21:33:03 +00:00
Blackfin Don't completely eliminate identity copies that also modify super register liveness. 2011-03-31 17:55:25 +00:00
CBackend
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
CPP
Generic Un-XFAIL this test for ARM. <rdar://problem/7662569> 2011-04-20 21:47:45 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Lower BlockAddress node when relocation-model is static. 2011-04-25 17:10:45 +00:00
MSP430
PowerPC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
PTX PTX: support for bitwise operations on predicates 2011-04-28 00:19:51 +00:00
SPARC These tests no longer require linear scan because reserved register coalescing is now universal. 2011-04-05 21:40:41 +00:00
SystemZ Fix SystemZ tests 2011-03-31 23:02:12 +00:00
Thumb Be careful about scheduling nodes above previous calls. It increase usages of 2011-04-26 21:31:35 +00:00
Thumb2 Teach Thumb2 isel to fold and->rotr ==> ROR. 2011-04-29 14:18:15 +00:00
X86 Change DwarfCFIException's member variables to track what it actually 2011-04-29 14:48:51 +00:00
XCore Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 2011-03-31 18:42:43 +00:00